米6体育平台手机版

ZHCSNH1C May 2021 – November 2022 DLPC6540

PRODUCTION DATA

6.19 Programmable Output Clock Timing Requirements

PARAMETER		MIN	MAX	UNIT
f_clock	Clock frequency, OCLKA ⁽¹⁾	0.19	48.75	MHz
t_clock	Clock period, OCLKA	20.52	5263.15	ns
t_w(H)	Pulse duration high, OCLKA (50% reference points)	(t_clock/2) - 2		ns
t_w(L)	Pulse duration low, OCLKA (50% reference points)	(t_clock/2) - 2		ns
t_cclkjit	Jitter, OCLKA		200	ps
f_clock	Clock frequency, OCLKB ⁽¹⁾	0.19	48.75	MHz
t_clock	Clock period, OCLKB	20.52	5263.15	ns
t_w(H)	Pulse duration high, OCLKB (50% reference points)	(t_clock/2) - 2		ns
t_w(L)	Pulse duration low, OCLKB (50% reference points)	(t_clock/2) - 2		ns
t_cclkjit	Jitter, OCLKB		200	ps
f_clock	Clock frequency, OCLKC ⁽¹⁾	0.19	48.75	MHz
t_clock	Clock period, OCLKC	20.52	5263.15	ns
t_w(H)	Pulse duration high, OCLKC (50% reference points)	(t_clock/2) - 2		ns
t_w(L)	Pulse duration low, OCLKC (50% reference points)	(t_clock/2) - 2		ns
t_cclkjit	Jitter, OCLKC		200	ps
f_clock	Clock frequency, OCLKD ⁽¹⁾	0.19	48.75	MHz
t_clock	Clock period, OCLKD	20.52	5263.15	ns
t_w(H)	Pulse duration high, OCLKD (50% reference points)	(t_clock/2) - 2		ns
t_w(L)	Pulse duration low, OCLKD (50% reference points)	(t_clock/2) - 2		ns
t_cclkjit	Jitter, OCLKD		200	ps

(1)

OCLKA is a dedicated pin, while OCLKB thru OCLKD are available via GPIO as alternate functions.
The frequency of OCLKA thru OCLKD is programmable, with each having a power-up default frequency of 0.77 MHz. This default frequency is not that meaningful for OCLKB thru OCLKD since they must be configured to their alternate GPIO function before they can be used as a clock output.