ZHCSVQ6 April 2024 DLPC7530
PRODUCTION DATA
DLPC7530 控制器 DMD 接口支持两个用于数据传输的高速串行接口 (HSSI) 仅输出接口:一个用于命令写入事务的单低速 LVDS 仅输出接口,以及一个用于命令读取事务的低速单端输入接口。每个 HSSI 端口都支持端口内仅传输完整数据的通道间重映射,但不支持端口之间的重映射。使用此特性时,每个唯一数据通道对只能映射到一个唯一目标数据通道对,并且不支持通道间重映射(即 P 与 N 交换)。此外,也可以交换两个 HSSI 端口。通道和端口重映射(在闪存中指定)有助于根据需要进行电路板布局布线。HSSI 端口数和所需的 HSSI 通道数/每个 HSSI 端口数取决于 DMD 类型和 DMD 显示分辨率。表 6-19 显示了一些重映射示例。使用这两个端口时,它们无需具有相同的引脚映射。
DLPC7530 控制器引脚到 DMD 引脚的重映射示例 | DMD 引脚 | |||
---|---|---|---|---|
基线 | 翻转 HSSI0 180 无翻转 HSSI1 | 将 HSSI0 端口交换为 HSSI1 端口 | 将 HSSI0 端口交换为 HSSI1 端口和混合重映射 | |
DMD_HSSI0_D0_P DMD_HSSI0_D0_N | DMD_HSSI0_D7_P DMD_HSSI0_D7_N | DMD_HSSI1_D0_P DMD_HSSI1_D0_N | DMD_HSSI1_D2_P DMD_HSSI1_D2_N | DMD_HSSI0_D0_P DMD_HSSI0_D0_N |
DMD_HSSI0_D1_P DMD_HSSI0_D1_N | DMD_HSSI0_D6_P DMD_HSSI0_D6_N | DMD_HSSI1_D1_P DMD_HSSI1_D1_N | DMD_HSSI1_D3_P DMD_HSSI1_D3_N | DMD_HSSI0_D1_P DMD_HSSI0_D1_N |
DMD_HSSI0_D2_P DMD_HSSI0_D2_N | DMD_HSSI0_D5_P DMD_HSSI0_D5_N | DMD_HSSI1_D2_P DMD_HSSI1_D2_N | DMD_HSSI1_D0_P DMD_HSSI1_D0_N | DMD_HSSI0_D2_P DMD_HSSI0_D2_N |
DMD_HSSI0_D3_P DMD_HSSI0_D3_N | DMD_HSSI0_D4_P DMD_HSSI0_D4_N | DMD_HSSI1_D3_P DMD_HSSI1_D3_N | DMD_HSSI1_D1_P DMD_HSSI1_D1_N | DMD_HSSI0_D3_P DMD_HSSI0_D3_N |
DMD_HSSI0_D4_P DMD_HSSI0_D4_N | DMD_HSSI0_D3_P DMD_HSSI0_D3_N | DMD_HSSI1_D4_P DMD_HSSI1_D4_N | DMD_HSSI1_D6_P DMD_HSSI1_D6_N | DMD_HSSI0_D4_P DMD_HSSI0_D4_N |
DMD_HSSI0_D5_P DMD_HSSI0_D5_N | DMD_HSSI0_D2_P DMD_HSSI0_D2_N | DMD_HSSI1_D5_P DMD_HSSI1_D5_N | DMD_HSSI1_D7_P DMD_HSSI1_D7_N | DMD_HSSI0_D5_P DMD_HSSI0_D5_N |
DMD_HSSI0_D6_P DMD_HSSI0_D6_N | DMD_HSSI0_D1_P DMD_HSSI0_D1_N | DMD_HSSI1_D6_P DMD_HSSI1_D6_N | DMD_HSSI1_D4_P DMD_HSSI1_D4_N | DMD_HSSI0_D6_P DMD_HSSI0_D6_N |
DMD_HSSI0_D7_P DMD_HSSI0_D7_N | DMD_HSSI0_D0_P DMD_HSSI0_D0_N | DMD_HSSI1_D7_P DMD_HSSI1_D7_N | DMD_HSSI1_D5_P DMD_HSSI1_D5_N | DMD_HSSI0_D7_P DMD_HSSI0_D7_N |
DMD_HSSI1_D0_P DMD_HSSI1_D0_N | DMD_HSSI1_D0_P DMD_HSSI1_D0_N | DMD_HSSI0_D0_P DMD_HSSI0_D0_N | DMD_HSSI0_D6_P DMD_HSSI0_D6_N | DMD_HSSI1_D0_P DMD_HSSI1_D0_N |
DMD_HSSI1_D1_P DMD_HSSI1_D1_N | DMD_HSSI1_D1_P DMD_HSSI1_D1_N | DMD_HSSI0_D1_P DMD_HSSI0_D1_N | DMD_HSSI0_D7_P DMD_HSSI0_D7_N | DMD_HSSI1_D1_P DMD_HSSI1_D1_N |
DMD_HSSI1_D2_P DMD_HSSI1_D2_N | DMD_HSSI1_D2_P DMD_HSSI1_D2_N | DMD_HSSI0_D2_P DMD_HSSI0_D2_N | DMD_HSSI0_D4_P DMD_HSSI0_D4_N | DMD_HSSI1_D2_P DMD_HSSI1_D2_N |
DMD_HSSI1_D3_P DMD_HSSI1_D3_N | DMD_HSSI1_D3_P DMD_HSSI1_D3_N | DMD_HSSI0_D3_P DMD_HSSI0_D3_N | DMD_HSSI0_D5_P DMD_HSSI0_D5_N | DMD_HSSI1_D3_P DMD_HSSI1_D3_N |
DMD_HSSI1_D4_P DMD_HSSI1_D4_N | DMD_HSSI1_D4_P DMD_HSSI1_D4_N | DMD_HSSI0_D4_P DMD_HSSI0_D4_N | DMD_HSSI0_D2_P DMD_HSSI0_D2_N | DMD_HSSI1_D4_P DMD_HSSI1_D4_N |
DMD_HSSI1_D5_P DMD_HSSI1_D5_N | DMD_HSSI1_D5_P DMD_HSSI1_D5_N | DMD_HSSI0_D5_P DMD_HSSI0_D5_N | DMD_HSSI0_D3_P DMD_HSSI0_D3_N | DMD_HSSI1_D5_P DMD_HSSI1_D5_N |
DMD_HSSI1_D6_P DMD_HSSI1_D6_N | DMD_HSSI1_D6_P DMD_HSSI1_D6_N | DMD_HSSI0_D6_P DMD_HSSI0_D6_N | DMD_HSSI0_D0_P DMD_HSSI0_D0_N | DMD_HSSI1_D6_P DMD_HSSI1_D6_N |
DMD_HSSI1_D7_P DMD_HSSI1_D7_N | DMD_HSSI1_D7_P DMD_HSSI1_D7_N | DMD_HSSI0_D7_P DMD_HSSI0_D7_N | DMD_HSSI0_D1_P DMD_HSSI0_D1_N | DMD_HSSI1_D7_P DMD_HSSI1_D7_N |