ZHCSD20H October 2014 – June 2024 DLPC900
PRODUCTION DATA
For the best performance, it is recommended that the trace impedance for differential signals as in Table 9-8.
All signals must be 50Ω controlled impedance unless otherwise noted in Table 9-8.
SIGNAL ON PIN | DIFFERENTIAL IMPEDANCE |
---|---|
DCKA_(P,N) | 100Ω ±10% |
SCA_(P,N) | |
DDA_(P,N)_(15:00) | |
DCKB_(P,N) | 100Ω ±10% |
SCB_(P,N) | |
DDB_(P,N)_(15:00) | |
USB_DAT_(P,N) | 90Ω ±10% |
USB_(P,N) | |
All other Differential Signals | 100Ω ±10% |
Table 9-9 lists the signals’ routing priority assignment.
SIGNAL ON PIN | PRIORITY |
---|---|
DCKA_(P,N) SCA_(P,N) DDA_(P,N)_(15:00) DCKB_(P,N) SCB_(P,N) DDB_(P,N)_(15:00) | 1(1)(2)(3) |
USB_(P,N) USB_DAT_(P,N) | 2(1) |
P1(A,B,C)(9:2), P2(A,B,C)(9:2), P_CLK1, P_CLK2, P_CLK3, P_DATEN1, P_DATEN2, P1_VSYNC, P2_VSYNC, P1_HSYNC, P2_HSYNC | 3(1)(2)(3) |
OCLKA, MOSCP | 4(4) |