The device has several clock output configuration options. An external crystal or CMOS-level oscillator provides the stimulus for the internal PHY reference clock. The local reference clock acts as the central source for all clocking within the device.

Clock output options supported by the device include:

• MAC IF clock
• XI clock
• Free-running clock
• Recovered clock

MAC IF clock operates at the same rate as the MAC interface selected. For RMII operation, MAC IF Clock frequency is 50 MHz.

XI clock is a pass-through option, which allows for the XI pin clock to be passed to a GPIO pin. Note that the clock is buffered prior to transmission out of the GPIOs, and output clock amplitude is at the selected VDDIO level. This clock is available on CLK_OUT/LED1 pin by default after POR release (Refer to T4 in Power-Up Timing).

The Free-running clock is an internally generated 125-MHz free-running clock generated by the PLL. The free-running clock is suitable for asynchronous data transmission applications.

The recovered clock is a 125-MHz recovered clock that is recovered from the connected link partner. The PHY recovers the clock from the data received (transmitted from the link partner).

All clock configuration options are enabled using the LED GPIO configuration registers.

CLKOUT can be disabled by configuring this pin as an input pin via register configuration, register 0x304[2:0].