ZHCST33A
September 2023 – April 2024
DP83TC811-Q1
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Device Comparison Table
5
Pin Configuration and Functions
5.1
Pin Functions
5.2
Pin Multiplexing
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Timing Diagrams
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Wake-on-LAN (WoL) Packet Detection
7.3.1.1
Magic Packet Structure
7.3.1.2
Magic Packet Example
7.3.1.3
Wake-on-LAN Configuration and Status
7.3.2
Start of Frame Detect for IEEE 1588 Time Stamp
7.3.3
Diagnostic Tool Kit
7.3.3.1
Signal Quality Indicator
7.3.3.2
Electrostatic Discharge Sensing
7.3.3.3
Time Domain Reflectometry
7.3.3.4
Temperature and Voltage Sensing
7.3.3.5
Built-In Self-Test
7.3.3.6
Loopback Modes
7.3.3.6.1
xMII Loopback
7.3.3.6.2
PCS Loopback
7.3.3.6.3
Analog Loopback
7.3.3.6.4
Reverse Loopback
7.3.4
Compliance Test Modes
7.3.4.1
Test Mode 1
7.3.4.2
Test Mode 2
7.3.4.3
Test Mode 4
7.3.4.4
Test Mode 5
7.4
Device Functional Modes
7.4.1
Power Down
7.4.2
Reset
7.4.3
Disable
7.4.4
Standby
7.4.5
Normal
7.4.6
Sleep Request
7.4.7
Silent
7.4.8
Sleep
7.4.9
Low-Power Sleep
7.4.10
Wake-Up
7.4.11
State Transitions
7.4.11.1
State Transition #1 - Standby to Normal
7.4.11.2
55
7.4.11.3
State Transition #2 - Normal to Standby
7.4.11.4
State Transition #3 - Normal to Sleep Request
7.4.11.5
State Transition #4 - Sleep Request to Normal
7.4.11.6
State Transition #5 - Sleep Request to Standby
7.4.11.7
State Transition #6 - Sleep Request to Silent
7.4.11.8
State Transition #7 - Silent to Standby
7.4.11.9
State Transition #8 - Silent to Sleep
7.4.12
Media Dependent Interface
7.4.12.1
100BASE-T1 Master and 100BASE-T1 Slave Configuration
7.4.12.2
Auto-Polarity Detection and Correction
7.4.12.3
Jabber Detection
7.4.12.4
Interleave Detection
7.4.13
MAC Interfaces
7.4.13.1
Media Independent Interface
7.4.13.2
Reduced Media Independent Interface
7.4.13.3
Reduced Gigabit Media Independent Interface
7.4.13.4
Serial Gigabit Media Independent Interface
7.4.14
Serial Management Interface
7.4.15
Direct Register Access
7.4.16
Extended Register Space Access
7.4.17
Write Address Operation
7.4.17.1
MMD1 - Write Address Operation
7.4.18
Read Address Operation
7.4.18.1
MMD1 - Read Address Operation
7.4.19
Write Operation (No Post Increment)
7.4.19.1
MMD1 - Write Operation (No Post Increment)
7.4.20
Read Operation (No Post Increment)
7.4.20.1
MMD1 - Read Operation (No Post Increment)
7.4.21
Write Operation (Post Increment)
7.4.21.1
MMD1 - Write Operation (Post Increment)
7.4.22
Read Operation (Post Increment)
7.4.22.1
MMD1 - Read Operation (Post Increment)
7.5
Programming
7.5.1
Strap Configuration
7.5.2
LED Configuration
7.5.3
PHY Address Configuration
7.6
Register Maps
7.6.1
Register Access Summary
7.6.2
BMCR Register 0x0000 – Basic Mode Control Register
7.6.3
BMSR Register 0x0001 – Basic Mode Status Register
7.6.4
PHYID1 Register 0x0002 – PHY Identifier Register #1
7.6.5
PHYID2 Register 0x0003 – PHY Identifier Register #2
7.6.6
SGMII_CFG Register 0x0009 – SGMII Configuration Register
7.6.7
REGCR Register 0x000D – Register Control Register
7.6.8
ADDAR Register 0x000E – Address/Data Register
7.6.9
INT_TEST Register 0x0011 – Interrupt Test Register
7.6.10
INT_STAT1 Register 0x0012 – Interrupt Status Register #1
7.6.11
INT_STAT2 Register 0x0013 – Interrupt Status Register #2
7.6.12
FCSCR Register 0x0014 – False Carrier Sense Counter Register
7.6.13
RECR Register 0x0015 – Receive Error Count Register
7.6.14
BISTCR Register 0x0016 – BIST Control Register
7.6.15
xMII_CTRL Register 0x0017 – xMII Control Register
7.6.16
INT_STAT3 Register 0x0018 – Interrupt Status Register #3
7.6.17
BICTSR1 Register 0x001B – BIST Control and Status Register #1
7.6.18
BICTSR2 Register 0x001C – BIST Control and Status Register #2
7.6.19
TDR Register 0x001E – Time Domain Reflectometry Register
7.6.20
PHYRCR Register 0x001F – PHY Reset Control Register
7.6.21
LSR Register 0x0133 – Link Status Results Register
7.6.22
TDRR Register 0x016B – TDR Results Register
7.6.23
TDRLR1 Register 0x0180 – TDR Location Result Register #1
7.6.24
TDRLR2 Register 0x0181 – TDR Location Result Register #2
7.6.25
TDRPT Register 0x018A – TDR Peak Type Register
7.6.26
AUTO_PHY Register 0x018B – Autonomous PHY Control Register
7.6.27
PWRM Register 0x018C – Power Mode Register
7.6.28
SNR Register 0x0197 – Signal-to-Noise Ratio Result Register
7.6.29
SQI Register 0x0198 – Signal Quality Indication Register
7.6.30
LD_CTRL Register 0x0400 – Line Driver Control Register
7.6.31
LDG_CTRL1 Register 0x0401 – Line Driver Gain Control Register #1
7.6.32
SGMII_CTRL1 Register 0x0432 – SGMII Control Register #1
7.6.33
DLL_CTRL 0x0446 – RGMII DLL Control Register
7.6.34
ESDS Register 0x0448 – Electrostatic Discharge Status Register
7.6.35
SGMII_AUTO_TIMER Register 0x0456 – SGMII Auto-Negotiation Timer Configuration Register
7.6.36
SGMII_STAT Register 0x0459 – SGMII Auto-Negotiation Status Register
7.6.37
LED_CFG1 Register 0x0460 – LED Configuration Register #1
7.6.38
xMII_IMP_CTRL Register 0x0461 – xMII Impedance Control Register
7.6.39
IO_CTRL1 Register 0x0462 – GPIO Control Register #1
7.6.40
IO_CTRL2 Register 0x0463 – GPIO Control Register #2
7.6.41
STRAP Register 0x0467 – Strap Configuration Register
7.6.42
LED_CFG2 Register 0x0469 – LED Configuration Register #2
7.6.43
PLR_CFG Register 0x0475 – Polarity Auto-Correction Configuration Register
7.6.44
MON_CFG1 Register 0x0480 – Monitor Configuration Register #1
7.6.45
MON_CFG2 Register 0x0481 – Monitor Configuration Register #2
7.6.46
MON_CFG3 Register 0x0482 – Monitor Configuration Register #3
7.6.47
MON_STAT1 Register 0x0483 – Monitor Status Register #1
7.6.48
MON_STAT2 Register 0x0484 – Monitor Status Register #2
7.6.49
PCS_CTRL1 Register 0x0485 – PCS Control Register #1
7.6.50
PCS_CTRL2 Register – 0x0486 PCS Control Register #2
7.6.51
LPS_CTRL2 Register 0x0487 – LPS Control Register #2
7.6.52
INTER_CFG Register 0x0489 – Interleave Configuration
7.6.53
LPS_CTRL3 Register 0x0493 – LPS Control Register #3
7.6.54
JAB_CFG Register 0x0496 – Jabber Configuration Register
7.6.55
TEST_MODE_CTRL Register 0x0497 – Test Mode Control Register
7.6.56
WOL_CFG Register 0x04A0 – WoL Configuration Register
7.6.57
WOL_STAT Register 0x04A1 – WoL Status Register
7.6.58
WOL_DA1 Register 0x04A2 – WoL Destination Address Configuration Register #1
7.6.59
WOL_DA2 Register 0x04A3 – WoL Destination Address Configuration Register #2
7.6.60
WOL_DA3 Register 0x04A4 – WoL Destination Address Configuration Register #3
7.6.61
RXSOP1 Register 0x04A5 – Receive Secure-ON Password Register #1
7.6.62
RXSOP2 Register 0x04A6 – Receive Secure-ON Password Register #2
7.6.63
RXSOP3 Register 0x04A7 – Receive Secure-ON Password Register #3
7.6.64
RXPAT1 Register 0x04A8 – Receive Pattern Register #1
7.6.65
RXPAT2 Register 0x04A9 – Receive Pattern Register #2
7.6.66
RXPAT3 Register 0x04AA – Receive Pattern Register #3
7.6.67
RXPAT4 Register 0x04AB – Receive Pattern Register #4
7.6.68
RXPAT5 Register 0x04AC – Receive Pattern Register #5
7.6.69
RXPAT6 Register 0x04AD – Receive Pattern Register #6
7.6.70
RXPAT7 Register 0x04AE – Receive Pattern Register #7
7.6.71
RXPAT8 Register 0x04AF – Receive Pattern Register #8
7.6.72
RXPAT9 Register 0x04B0 – Receive Pattern Register #9
7.6.73
RXPAT10 Register 0x04B1 – Receive Pattern Register #10
7.6.74
RXPAT11 Register 0x04B2 Receive Pattern Register #11
7.6.75
RXPAT12 Register 0x04B3 – Receive Pattern Register #12
7.6.76
RXPAT13 Register 0x04B4 – Receive Pattern Register #13
7.6.77
RXPAT14 Register 0x04B5 – Receive Pattern Register #14
7.6.78
RXPAT15 Register 0x04B6 – Receive Pattern Register #15
7.6.79
RXPAT16 Register 0x04B7 – Receive Pattern Register #16
7.6.80
RXPAT17 Register 0x04B8 – Receive Pattern Register #17
7.6.81
RXPAT18 Register 0x04B9 – Receive Pattern Register #18
7.6.82
RXPAT19 Register 0x04BA Receive Pattern Register #19
7.6.83
RXPAT20 Register 0x04BB – Receive Pattern Register #20
7.6.84
RXPAT21 Register 0x04BC – Receive Pattern Register #21
7.6.85
RXPAT22 Register 0x04BD – Receive Pattern Register #22
7.6.86
RXPAT23 Register 0x04BE – Receive Pattern Register #23
7.6.87
RXPAT24 Register 0x04BF – Receive Pattern Register #24
7.6.88
RXPAT25 Register 0x04C0 – Receive Pattern Register #25
7.6.89
RXPAT26 Register 0x04C1 – Receive Pattern Register #26
7.6.90
RXPAT27 Register 0x04C2 Receive Pattern Register #27
7.6.91
RXPAT28 Register 0x04C3 – Receive Pattern Register #28
7.6.92
RXPAT29 Register 0x04C4 – Receive Pattern Register #29
7.6.93
RXPAT30 Register 0x04C5 – Receive Pattern Register #30
7.6.94
RXPAT31 Register 0x04C6 – Receive Pattern Register #31
7.6.95
RXPAT32 Register 0x04C7 – Receive Pattern Register #32
7.6.96
RXPBM1 Register 0x04C8 – Receive Pattern Byte Mask Register #1
7.6.97
RXPBM2 Register 0x04C9 – Receive Pattern Byte Mask Register #2
7.6.98
RXPBM3 Register 0x04CA – Receive Pattern Byte Mask Register #3
7.6.99
RXPBM4 Register 0x04CB – Receive Pattern Byte Mask Register #4
7.6.100
RXPATC Register 0x04CC – Receive Pattern Control Register
7.6.101
RXD3CLK Register 0x04E0 – RX_D3 Clock Control Register
7.6.102
LPS_CFG Register 0x04E5 – LPS Configuration Register
7.6.103
195
7.6.104
PMA_CTRL1 Register 0x0007 – MMD1 PMA Control Register #1
7.6.105
PMA_EXT1 Register 0x000B – MMD1 PMA Extended Ability Register #1
7.6.106
PMA_EXT2 Register 0x0012 – MMD1 PMA Extended Ability Register #2
7.6.107
PMA_CTRL2 Register 0x0834 – MMD1 PMA Control Register #2
7.6.108
TEST_CTRL Register 0x0836 – MMD1 100BASE-T1 PMA Test Control Register
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Design Requirements
8.2.1.1
Physical Medium Attachment
8.2.1.1.1
Common-Mode Choke Recommendations
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Layout
8.3.1
Layout Guidelines
8.3.1.1
Signal Traces
8.3.1.2
Return Path
8.3.1.3
Metal Pour
8.3.1.4
PCB Layer Stacking
8.3.2
Layout Example
8.4
Power Supply Recommendations
9
Device and Documentation Support
9.1
接收文档更新通知
9.2
支持资源
9.3
静电放电警告
9.4
术语表
9.5
Trademarks
10
Revision History
封装选项
机械数据 (封装 | 引脚)
RHA|36
MPQF611A
散热焊盘机械数据 (封装 | 引脚)
RHA|36
QFND711
订购信息
zhcst33a_oa
zhcst33a_pm
1
特性
符合 100BASE-T1 – IEEE 802.3bw 标准
符合 OPEN Alliance 标准
能够与 BroadR-Reach 和 100BASE-T1 PHY 互操作
符合面向汽车应用的 AEC-Q100 标准:
器件温度等级 1:–40°C 至 +125 °C 环境工作温度范围
器件 HBM ESD 分类等级 3A
除引脚 5 之外,其他所有引脚的器件 CDM ESD 分类等级均为 C5
引脚 5 的器件 CDM ESD 分类等级为 C3
引脚 12 和 13 的器件 IEC61000-4-2 ESD 分类等级为 4:±8kV 接触放电
MAC 接口:MII、RMII、RGMII 和 SGMII
VQFN,可湿侧面封装
支持 IEEE 1588 SFD
符合 AVB/TSN 标准的低发送和接收延迟
低有功功率运行:< 230mW
可配置的 I/O 电压:3.3V、2.5V 和 1.8V
省电功能:
睡眠、待机和禁用
局域网唤醒 (WoL)
诊断工具套件
信号质量指标 (SQI)
时域反射法 (TDR)
静电放电传感器
电压传感器
温度传感器
PRBS 内置自检 (BIST)
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