ZHCSQL1 May 2022 DP83TC813R-Q1 , DP83TC813S-Q1
PRODUCTION DATA
The DP83TC813S-Q1is capable of operating with a wide range of IO supply voltages (3.3 V, 2.5 V, or 1.8 V). No power supply sequencing is required. The recommended power supply de-coupling network is shown in the figure below. For improved conducted emissions, an optional ferrite bead may be placed between the supply and the PHY de-coupling network.
Typical TC-10 application block diagram along with supply and peripherals is shown below. TPS7B81-Q1 is the recommended part number to be used as 3.3V LDO for the VSLEEP rail. The low quiescent current of this LDO makes it ideal for TC-10 applications.
When VDDIO and VDDMAC are separate, both voltage rails must have a dedicated network of ferrite bead, 0.47uF, and 0.01uF capacitors. VSLEEP can also be connected to VDDA, 0.1uF capacitor must be retained in this configuration.
The following table highlights the break down of power consumption in active mode for each supply rail, specifically highlighting the split between VDDMAC and VDDIO.
| VOLTAGE RAIL | VOLTAGE (V) | MAX CURRENT (mA)1 |
|---|---|---|
| MII | ||
| VDDA | 3.3 | 63 |
| VDDIO | 3.3 | 4 |
| 2.5 | 3 | |
| 1.8 | 2 | |
| VDDMAC | 3.3 | 20 |
| 2.5 | 15 | |
| 1.8 | 11 | |
|
VSLEEP |
3.3 | 2 |
| RMII | ||
| VDDA | 3.3 | 63 |
| VDDIO | 3.3 | 6 |
| 2.5 | 4 | |
| 1.8 | 3 | |
| VDDMAC | 3.3 | 17 |
| 2.5 | 13 | |
| 1.8 | 10 | |
|
VSLEEP |
3.3 | 2 |
| RGMII | ||
| VDDA | 3.3 | 63 |
| VDDIO | 3.3 | 4 |
| 2.5 | 3 | |
| 1.8 | 2 | |
| VDDMAC | 3.3 | 17 |
| 2.5 | 13 | |
| 1.8 | 10 | |
|
VSLEEP |
3.3 | 2 |
| SGMII | ||
| VDDA | 3.3 | 95 |
| VDDIO | 3.3 | 4 |
| 2.5 | 3 | |
| 1.8 | 2 | |
| VDDMAC | 3.3 | 8 |
| 2.5 | 6 | |
| 1.8 | 4 | |
|
VSLEEP |
3.3 | 2 |