ZHCSLL4 December 2021 DP83TC814R-Q1 , DP83TC814S-Q1
PRODUCTION DATA
Reset is activated upon power-up, when RESET is pulled LOW (for the minimum reset pulse time) or if hardware reset is initiated by setting bit[15] in register 0x1F. All digital circuitry is cleared along with register settings during reset. Once reset completes, device bootstraps are re-sampled and associated bootstrap registers are set accordingly. PMA termination is not present in reset.