SNLS771A May 2024 – November 2024 DP83TC818S-Q1
PRODUCTION DATA
The DP83TC818S-Q1 integrates IEEE 1588v2/802.1AS timestamping and other additional hardware engines to offer highly accurate synchronization with synchronization jitter of < ±15ns (with options to reduce to ±1ns for point-to-point connections) and synchronization offset of ±30ns.
The DP83TC818S-Q1 is also capable of providing a high quality time synchronized clock signal to achieve system level synchronization for ADAS sensor data synchronisation, Corner RADAR Chirp synchronisation, 1 pps signal for LiDAR, V2X, etc.