SNLS777A May   2024  – June 2024 DP83TG721R-Q1 , DP83TG721S-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison Table
  6. 5Application Information
    1. 5.1 Time Synchronization
    2. 5.2 Integrated Audio Over Ethernet
    3. 5.3 TC10 Sleep/Wake-Up
    4. 5.4 DP83TG721 EVM-MC and Software Support
    5. 5.5 Comparison of Device Features
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Revision History

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5.2 Integrated Audio Over Ethernet

DP83TG721-Q1 offers audio clocking solutions for AVB (Audio Video Bridging) and other audio transports protocols (IES676, IEEE 1733 RTP, Dante) by:

  • Generating IEEE 1722 Media Clock with embedded CRF packet decode
  • Synchronized clocks (FSYNC, BCLK, MCLK) for Audio interface I2S and TDMx
DP83TG721R-Q1 DP83TG721S-Q1 Typical Audio Over Ethernet ArchitectureFigure 5-2 Typical Audio Over Ethernet Architecture
DP83TG721R-Q1 DP83TG721S-Q1 Audio Over Ethernet Architecture with DP83TG721-Q1Figure 5-3 Audio Over Ethernet Architecture with DP83TG721-Q1
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