ZHCSJ33F December 2015 – May 2019 DRA745 , DRA746 , DRA750 , DRA756
PRODUCTION DATA.
The USB 3.0 has two unidirectional differential pairs: TXp/TXn pair and RXp/RXn pair. AC coupling caps are needed on the board for TX traces.
Figure 8-39 present high level schematic diagram for USB 3.0 interface.
NOTE
ESD components should be on a PCB layer next to a system GND plane layer so the inductance of the via to GND will be minimal.
If vias are used, place the vias near the AC Caps or CMFs and under the SoC BGA, if necessary.
Figure 8-40 present placement diagram for USB 3.0 interface.
INTERFACE | COMPONENT | SUPPLIER | PART NUMBER |
---|---|---|---|
USB3 PHY | ESD | TI | TPD1E05U06 |
CMF | Murata | DLW21SN900HQ2 | |
C | - | 100nF (typical size: 0201) |