ZHCSP55A October 2019 – October 2021 DRV10982-Q1
PRODUCTION DATA
PIN | TYPE (1) | DESCRIPTION | |
---|---|---|---|
N/AME | HTSSOP | ||
CPN | 3 | P | Charge pump pin 1, use a ceramic capacitor between CPN and CPP |
CPP | 2 | P | Charge pump pin 2, use a ceramic capacitor between CPN and CPP |
DIR | 14 | I | Direction; When low, phase driving sequence is U → V → W When high, phase driving sequence is U → W → V |
FG | 12 | O | FG signal output indicates speed of motor |
GND | 8 | P | Digital and analog ground |
PGND | 15, 16 | P | Power ground |
SCL | 10 | I | I2C clock signal |
SDA | 11 | I/O | I2C data signal |
SPEED | 13 | I | Speed control signal for PWM or analog input speed command |
SW | 4 | O | Step-down regulator switching node output |
SWGND | 5 | P | Step-down regulator ground |
U | 17, 18 | O | Motor U phase |
V | 19, 20 | O | Motor V phase |
V1P8 | 7 | P | Internal 1.8-V digital core voltage. V1P8 capacitor must connect to GND. This is an output, but is not specified to drive external loads. |
V3P3 | 9 | P | Internal 3.3-V supply voltage. V3P3 capacitor must connect to GND. This is an output and may drive external loads not to exceed IV3P3_MAX. |
VCC | 23, 24 | P | Device power supply |
VCP | 1 | P | Charge pump output, use a ceramic capacitor between VCP and VCC |
VREG | 6 | P | Step-down regulator output and feedback point |
W | 21, 22 | O | Motor W phase |
Thermal pad (GND) | — | P | The exposed thermal pad must be electrically connected to the ground plane by soldering to the PCB for proper operation, and connected to the bottom side of the PCB through vias for better thermal spreading. |