The load diagnostic function runs on assertion of EN or when the device is in a fault state (dc detect, overcurrent, overvoltage, undervoltage, and overtemperature). During this test, the outputs are in a Hi-Z state. The device determines whether the output is a short to GND, short to VDD, open load, or shorted load. The load diagnostic biases the output, which therefore requires limiting the capacitance value for proper functioning. The load diagnostic test takes approximately 229 ms to run. Note that the check phase repeats up to five times if a fault is present or a large capacitor to GND is present on the output. On detection of an open load, the output still operates. On detection of any other fault condition, the output goes into a Hi-Z state, and the device checks the load continuously until removal of the fault condition. After detection of a normal output condition, the output starts. The load diagnostics run after every other overvoltage (OV) event. The load diagnostic for open load only has I²C reporting. All other faults have I²C and INTZ pin assertion.

The device performs load diagnostic tests as shown in Figure 7-2.

Figure 7-2 Load Diagnostics Sequence of Events

Figure 7-3 illustrates how the diagnostics determine the load based on output conditions.

Figure 7-3 Load Diagnostic Reporting Thresholds