ZHCSEJ7B October 2015 – April 2018 DRV2605L-Q1
PRODUCTION DATA.
The EN pin of the DRV2605L-Q1 device gates the active operation. When the EN pin is logic high, the DRV2605L-Q1 device is active. When the EN pin is logic low, the device enters the shutdown state, which is the lowest power state of the device. The device registers are not reset. The EN pin operation is particularly useful for constant-source PWM and analog input modes to maintain compatibility with non-I2C device signaling. The EN pin must be high to write I2C device registers. However, if the EN pin is low the DRV2605L-Q1 device can still acknowledge (ACK) during an I2C transaction, however, no read or write is possible. To completely reset the device to the powerup state, set the DEV_RESET bit in register 0x01.