An analog current limit circuit on each FET limits the current through the FET by limiting the gate drive internally. If this analog current limit persists for longer than the OCP deglitch time (t_OCP), all FETs in the H-bridge will disable. The driver re-enables after the OCP retry period (t_RETRY) has passed. If the fault condition is still present, the cycle repeats as shown in Figure 8-6.

Figure 8-6 OCP Operation

Overcurrent conditions are detected independently on both high- and low-side FETs. This means that a short to ground, supply, or across the motor winding will all result in an overcurrent shutdown. Overcurrent protection does not use the current sense circuitry used for current regulation, so it functions regardless of VREF and IPROPI settings.