ZHCSI91B November 2017 – July 2018 DRV8304
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
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Half-bridge overcurrent is also monitored by sensing the voltage drop across the external current-sense resistor with the SPX pin. If at any time, the voltage on the SP input of the current-sense amplifier exceeds the VSEN_OCP threshold for longer than the tOCP_DEG deglitch time, a SEN_OCP event is recognized and action is done according to the OCP_MODE bit. On the hardware interface device, the VSENSE threshold is fixed at 1 V, tOCP_DEG is fixed at 4 µs, and the OCP_MODE bit for VSENSE is fixed for 4-ms automatic retry. On the SPI device, the VSENSE threshold is set through the SEN_LVL SPI register and the OCP_MODE bit can operate in four different modes: VSENSE latched shutdown, VSENSE automatic retry, VSENSE report only, and VSENSE disabled.