ZHCSF68D May 2015 – July 2019 DRV8305-Q1
PRODUCTION DATA.
The DRV8305-Q1 gate driver implements a strong pulldown scheme during turn on of the opposite MOSFET for preventing parasitic dV/dt turn on. Parasitic dV/dt turn on can occur when charge couples into the gate of the low-side MOSFET during a switching event. If the charge induces enough voltage to cross the threshold of the low-side MOSFET shoot-through can occur in the half-bridge. To prevent this the Smart Gate Drive Architecture: TDRIVE state machine turns on a strong pulldown during switching. After the switching event has completed, the gate driver switches back to a lower hold off pulldown to improve efficiency.