ZHCSHZ0A April 2018 – July 2018 DRV8306
PRODUCTION DATA.
The high-side gate-drive voltage supply is created using a doubler charge pump that operates from the VM voltage supply input. The charge pump lets the gate driver correctly bias the high-side MOSFET gate with respect to its source across a wide input supply voltage range. The charge pump is regulated to maintain a fixed output voltage of VVM + 10 V and supports an average output current of 15 mA. When the VVM voltage is less than 12 V, the charge pump operates in full doubler mode and generates VVCP = 2 × VVM – 1.5 V when unloaded. The charge pump is continuously monitored for undervoltage to prevent under-driven MOSFET conditions. The charge pump requires a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VM and VCP pins to act as the storage capacitor. Additionally, a X5R or X7R, 22-nF, VM-rated ceramic capacitor is required between the CPH and CPL pins to act as the flying capacitor.
The low-side gate drive voltage is created using a linear low-dropout (LDO) regulator that operates from the VM voltage supply input. The LDO regulator allows the gate driver to properly bias the low-side MOSFET gate with respect to ground. The LDO regulator output is fixed at 10 V and supports an output current of 15 mA. The LDO regulator is monitored for undervoltage to prevent under-driven MOSFET conditions.