ZHCSOY8B September 2021 – February 2022 DRV8311
PRODUCTION DATA
If the die temperature exceeds the trip point of the thermal warning (TOTW), the OT bit in the device status (DEV_STS1) register and OTW bit in the OT_STS status register is set. The reporting of OTW on the nFAULT pin can be enabled by setting the over-temperature warning reporting (OTW_EN) bit in the configuration control register. The device performs no additional action and continues to function. In this case, the nFAULT pin releases and OTW bit cleared when the die temperature decreases below the hysteresis point of the thermal warning (TOTW_HYS). The OT bit remains latched until cleared through the CLR_FLT bit or an nSLEEP reset pulse (tRST) and the die temperature is lower than thermal warning trip (TOTW).
In hardware device variants, Over Temperature warning is not reported on nFAULT pin by default.