If at any time the voltage on VFB_BK pin falls lower than the V_{BK_UV} threshold, the nFAULT pin is driven low and the BK_FLT bit in IC_STAT register is set while the driver FETs, charge pump, and digital logic control continue to operate normally. The FAULT and BUCK_UV bits are also latched high in the status registers. Normal operation starts again (buck regulator operation and the nFAULT pin is released) when the buck undervoltage condition clears. The BK_FLT and BUCK_UV bits stay set until cleared through the CLR_FLT bit or an nSLEEP pin reset pulse (t_RST).