The DRV8316C-Q1 device consists of an integrated 95-mΩ (combined high-side and low-side FET's on-state resistance) NMOS FETs connected in a three-phase H-bridge configuration. A doubler charge pump provides the proper gate-bias voltage to the high-side NMOS FET's across a wide operating-voltage range in addition to providing 100% duty-cycle support. An internal linear regulator provides the gate-bias voltage for the low-side MOSFETs. The device has three VM motor power-supply pins which are to be connected together to the motor-supply voltage.