8.1 Overview

The DRV832x family of devices is an integrated 6 to 60-V gate driver for three-phase motor drive applications. These devices decrease system component count, cost, and complexity by integrating three independent half-bridge gate drivers, charge pump, and linear regulator for the supply voltages of the high-side and low-side gate drivers.The device also integrates optional triple current shunt (or current sense) amplifiers and an optional
600-mA buck regulator. A standard serial peripheral interface (SPI) provides a simple method for configuring the various device settings and reading fault diagnostic information through an external controller. Alternatively, a hardware interface (H/W) option allows for configuring the most common settings through fixed external resistors.

The gate drivers support external N-channel high-side and low-side power MOSFETs and can drive up to 1-A source, 2-A sink peak currents with a 25-mA average output current. A doubler charge pump generates the supply voltage of the high-side gate drive. This charge pump architecture regulates the VCP output to V_VM +
11 V. The supply voltage of the low-side gate driver is generated using a linear regulator from the VM power supply that regulates to 11 V. A Smart Gate Drive architecture provides the ability to dynamically adjust the strength of the gate drive output current which lets the gate driver control the V_DS switching speed of the power MOSFET. This feature lets the user remove the external gate drive resistors and diodes, reducing the component count in the bill of materials (BOM), cost, and area of the printed circuit board (PCB). The architecture also uses an internal state machine to protect against short-circuit events in the gate driver, control the half-bridge dead time, and protect against dV/dt parasitic turnon of the external power MOSFET.

The DRV8323 and DRV8323R devices integrate three bidirectional current sense amplifiers for monitoring the current level through each of the external half-bridges using a low-side shunt resistor. The gain setting of the current sense amplifier can be adjusted through the SPI or hardware interface. The SPI method provides additional flexibility to adjust the output bias point.

The DRV8320R and DRV8323R devices integrate a 600-mA buck regulator that can be used to power an external controller or other logic circuits. The buck regulator is implemented as a separate internal die that can use either the same or a different power supply than the gate driver.

In addition to the high level of device integration, the DRV832x family of devices provides a wide range of integrated protection features. These features include power supply undervoltage lockout (UVLO), charge pump undervoltage lockout (CPUV), V_DS overcurrent monitoring (OCP), gate driver short-circuit detection (GDF), and overtemperature shutdown (OTW and OTSD). Fault events are indicated by the nFAULT pin with detailed information available in the SPI registers on the SPI device version.

The DRV832x family of devices are available in 0.5-mm pin pitch, QFN surface-mount packages. The QFN sizes are 5 × 5 mm for the 32-pin package, 6 × 6 mm for the 40-pin package, and 7 × 7 mm for the 48-pin package.