ZHCSR67 July 2020 DRV8353M
PRODUCTION DATA
The current-sense amplifiers on the DRV8353M SPI devices can be configured to amplify the voltage across the external low-side MOSFET VDS. This allows for the external controller to measure the voltage drop across the MOSFET RDS(on) without the shunt resistor and then calculate the half-bridge current level.
To enable this mode set the CSA_FET bit to 1. The positive input of the amplifier is then internally connected to the SHx pin with an internal clamp to prevent high voltage on the SHx pin from damaging the sense amplifier inputs. During this mode of operation, the SPx pins should stay connected to the source of the low-side MOSFET as it serves as the reference for the low-side gate driver. When the CSA_FET bit is set to 1, the negative reference for the low-side VDS monitor is automatically set to SNx, regardless of the state of the LS_REF bit state. This setting is implemented to prevent disabling of the low-side VDS monitor.
If the system operates in MOSFET VDS sensing mode, route the SHx and SNx pins with Kelvin connections across the drain and source of the external low-side MOSFETs.
When operating in MOSFET VDS sense mode, the amplifier is enabled at the end of the tDRIVE time. At this time, the amplifier input is connected to the SHx pin, and the SOx output is valid. When the low-side MOSFET receives a signal to turn off, the amplifier inputs, SPx and SNx, are shorted together internally.