Half-bridge overcurrent is also monitored by sensing the voltage drop across the external current-sense resistor with the SP pin. If at any time, the voltage on the SP input of the current-sense amplifier exceeds the V_{SEN_OCP} threshold for longer than the t_{OCP_DEG} deglitch time, a SEN_OCP event is recognized and action is done according to the OCP_MODE. On hardware interface devices, the V_SENSE threshold is fixed at 1 V, t_{OCP_DEG} is fixed at 4 µs, and the OCP_MODE for V_SENSE is fixed for 8-ms automatic retry. On SPI devices, the V_SENSE threshold is set through the SEN_LVL SPI register, the t_{OCP_DEG} is set through the OCP_DEG SPI register, and the OCP_MODE bit can operate in four different modes: V_SENSE latched shutdown, V_SENSE automatic retry, V_SENSE report only, and V_SENSE disabled.

The V_SENSE overcurrent protection operates in cycle-by-cycle (CBC) mode by default. This can be disabled on SPI device variants through the SPI registers. When in cycle-by-cycle (CBC) mode a new rising edge on the PWM inputs will clear an existing overcurrent fault.

Additionally, on SPI devices the OCP_ACT register setting can be set to change the SEN_OCP overcurrent response between linked and individual shutdown modes. When OCP_ACT is 0, a SEN_OCP fault will only effect the half-bridge in which it occurred. When OCP_ACT is 1, all three half-bridges will respond to a SEN_OCP fault on any of the other half-bridges. OCP_ACT defaults to 0, individual shutdown mode.