ZHCSG08E October 2016 – January 2021 DRV8702-Q1 , DRV8703-Q1
PRODUCTION DATA
The VDS monitor threshold voltage, VDS(OCP), is configured based on the maximum current, IVDS, and RDS(on) of the FETs. The drain to source voltage, VDSFET, is the maximum current, IVDS, multiplied by the RDS(on) of the FET.
The VDS pin of the DRV8702-Q1 selects the VDS monitor trip threshold, VDS(OCP). The VDS bits in the VDS register of the DRV8703-Q1 selects the VDS(OCP) voltage. Use Equation 9 to calculate the trip current.
If the RDS(on) of the FET is 1.8 mΩ and the desired maximum current is less than 100 A, the VDSFET voltage is equal to 180 mV as shown in Equation 10.
For this example, select a value for the VDS(OCP) that is less than 180 mV. A VDS(OCP) value of 0.12 V was selected for this application.
To set the VDS(OCP) to 0.12 V, use the SPI (DRV8703-Q1 Only) or place a 33k resistor at the VDS pin to ground (DRV8702-Q1 Only).
The VDS pin can configured to select other VDS(OCP) threshold voltages. See the GUID-DD931F09-89B2-4344-A545-568F8A2BF37C.html#GUID-DD931F09-89B2-4344-A545-568F8A2BF37C section for more information on VDS operation.