The IDRIVE component of the smart gate drive architecture implements adjustable gate drive current control to adjust the external MOSFET V_DS slew rate. This is achieved by implementing adjustable pull up (I_DRVP) and pull down (I_DRVN) current sources for the internal gate driver architecture.

The external MOSFET V_DS slew rates are a critical factor for optimizing radiated and conducted emissions, diode reverse recovery, dV/dt parasitic gate coupling, and overvoltage or undervoltage transients on the switch-node of the half-bridge. IDRIVE operates on the principle that the V_DS slew rates are predominantly determined by the rate of the gate charge (or gate current) delivered during the MOSFET Q_GD or Miller charging region. By allowing the gate driver to adjust the gate current, it can effectively control the slew rate of the external power MOSFETs.

IDRIVE allows the DRV871x-Q1 to dynamically change the gate driver current setting through the IDRVP_x and IDRVN_x SPI registers or IDRIVE pin on H/W interface devices. The device provides 16 settings between the 0.5-mA and 62-mA range for the source and sink currents as shown in Table 7-16. The peak gate drive current is available for the t_DRIVE duration. After the MOSFET is switched and the t_DRIVE duration expires, the gate driver switches to a hold current (I_HOLD) for the pull up source current to limit the output current in case of a short circuit condition and to improve the efficiency of the driver.

On SPI interface devices, the IDRV_LOx control register allows for 16 settings <0.5mA if extremely low slew rate control is required.