The automatic duty cycle compensation (DCC) smart gate driver feature is a function to match the turn on and turn off signals in order to reduce duty cycle distortion that occurs due to different delays in the turn on and turn off sequences. The difference in turn on and turn off delay is introduced by a dependancy on whether the freewheeling MOSFET must be charged or discharged before the V_SHx slew can occur. If the freewheeling MOSFET charges or discharges before the drive MOSFET this can introduce a mismatch causing duty cycle distortion. The DCC control loop adds an additional delay to match both the turn on and turn off delays. This function can be utilized in the standard drive modes or in combination with the PDR or STC control modes.

The DCC function is enabled through the EN_DCC_xx register setting. Set the active half-bridge that will receive PWM control through the SET_AGD_xx register setting (DRV8718-Q1 only).