In the H-bridge control mode, each two pairs of half-bridge gate drivers can be controlled as an H-bridge gate driver for a total of two H-bridge gate drivers for the DRV8714-Q1. The H-bridge pairs are half-bridges 1 / 2 and 3 / 4 for the DRV8714-Q1. The DRV8714-Q1 can control the 2 H-bridge gate driver pairs through direct inputs pins or SPI control registers. The H-bridge gate drivers have two input control modes that can be configured through the BRG_MODE register setting (01b = PH/EN and 10b = PWM) on SPI interface variants or the MODE pin (Level 2 = PH/EN and Level 3 = PWM) on H/W interface variants. The PH/EN mode allows for the H-bridge to be controlled with a speed/direction type of interface commanded by one PWM signal and one GPIO signal. The PWM mode allows for the H-bridge to be controlled with a more advanced scheme typically requiring two PWM signals. This allows the H-bridge driver to enter four different output states for additional control flexibility if required.

The DRV8714-Q1 PWM inputs pins (IN1/EN1, IN2/PH1, IN3/EN2, IN4/PH2) are used to set the PWM frequency and duty cycle for the assigned output. If PWM control is not required, the two h-bridge gate drivers can be controlled directly through the SPI control registers. The INx/ENx and INx/PHx SPI control can be enabled through the INx/ENx_MODE and INx/PHx_MODE register settings. Each H-bridge can be individually set to Hi-Z through the HIZ register setting.

The default active freewheeling mode is active low-side. The DRV8714-Q1 SPI interface variants provide the ability to configure the freewheeling state through the FW register setting. This setting can be utilized to modify the bridge between low-side or high-side active freewheeling. The H/W interface variants default to low-side freewheeling.

The PH/EN control logic and output states for the gate drivers are shown in Table 7-9 and Table 7-10.

The PWM control logic and output states for the gate drivers are shown in Table 7-11 and Table 7-12

Figure 7-9 H-Bridge Control Example