ZHCSCK7A June 2014 – June 2014 DRV8802-Q1
PRODUCTION DATA.
5 Pin Configuration and Functions
28-Pin HTSSOP With PowerPAD
PWP Package
Top View
Pin Functions
| PIN | TYPE(1) | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS |
|
|---|---|---|---|---|
| NAME | NO. | |||
| POWER AND GROUND | ||||
| CP1 | 1 | IO | Charge pump flying capacitor | Connect a 0.01-μF 50-V capacitor between CP1 and CP2. |
| CP2 | 2 | IO | Charge pump flying capacitor | |
| GND | 14 | — | Device ground | |
| 28 | ||||
| V3P3OUT | 15 | O | 3.3-V regulator output | Bypass to GND with a 0.47-μF 6.3-V ceramic capacitor. Can be used to supply VREF. |
| VMA | 4 | — | Bridge A power supply | Connect to motor supply (8 to 45 V). Both pins must be connected to same supply. |
| VMB | 11 | — | Bridge B power supply | |
| VCP | 3 | IO | High-side gate drive voltage | Connect a 0.1-μF 16-V ceramic capacitor and a 1-MΩ resistor to VMx. |
| CONTROL | ||||
| AI0 | 24 | I | Bridge A current set | Sets bridge A current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
| AI1 | 25 | I | ||
| AENBL | 21 | I | Bridge A enable | Logic high to enable bridge A |
| APHASE | 20 | I | Bridge A phase (direction) | Logic high sets AOUT1 high, AOUT2 low |
| AVREF | 12 | I | Bridge A current set reference input | Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (for example, V3P3OUT). |
| BVREF | 13 | I | Bridge B current set reference input | |
| BI0 | 26 | I | Bridge B current set | Sets bridge B current: 00 = 100%, 01 = 71%, 10 = 38%, 11 = 0 |
| BI1 | 27 | I | ||
| BENBL | 22 | I | Bridge B enable | Logic high to enable bridge B |
| BPHASE | 23 | I | Bridge B phase (direction) | Logic high sets BOUT1 high, BOUT2 low |
| DECAY | 19 | I | Decay (brake) mode | Low = brake (slow decay), high = coast (fast decay) |
| nRESET | 16 | I | Reset input | Active-low reset input initializes internal logic and disables the H-bridge outputs |
| nSLEEP | 17 | I | Sleep mode input | Logic high to enable device, logic low to enter low-power sleep mode |
| STATUS | ||||
| nFAULT | 18 | OD | Fault | Logic low when in fault condition (overtemperature, overcurrent) |
| OUTPUT | ||||
| AOUT1 | 5 | O | Bridge A output 1 | Connect to motor winding A |
| AOUT2 | 7 | O | Bridge A output 2 | |
| BOUT1 | 10 | O | Bridge B output 1 | Connect to motor winding B |
| BOUT2 | 8 | O | Bridge B output 2 | |
| ISENA | 6 | IO | Bridge A ground and current sense | Connect to current sense resistor for bridge A |
| ISENB | 9 | IO | Bridge B ground and current sense | Connect to current sense resistor for bridge B |
(1) I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output