ZHCSCK7A June   2014  – June 2014 DRV8802-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Control
      3. 7.3.3 Current Regulation
      4. 7.3.4 Decay Mode and Braking
      5. 7.3.5 Blanking Time
      6. 7.3.6 nRESET and nSLEEP Operation
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 Overcurrent Protection (OCP)
        2. 7.3.7.2 Thermal Shutdown (TSD)
        3. 7.3.7.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Drive Current
        2. 8.2.2.2 Slow-Decay SR (Brake Mode)
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supply and Logic Sequencing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Information
      1. 10.3.1 Thermal Protection
      2. 10.3.2 Power Dissipation
      3. 10.3.3 Heatsinking
  11. 11器件和文档支持
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Application and Implementation

8.1 Application Information

The DRV8802-Q1 device is used in medium voltage brushed-DC motor control applications.

8.2 Typical Application

typ_app_slvsci2.gifFigure 7. Typical Application Diagram

8.2.1 Design Requirements

The example supply for this design is V(VMx) = 18 V.

8.2.2 Detailed Design Procedure

8.2.2.1 Drive Current

The current path is through the high-side sourcing DMOS driver, motor winding, and low-side sinking DMOS power driver. Power dissipation I2R losses in one source and sink DMOS driver are shown in Equation 2.

Equation 2. E001_SLVSAS7.gif

8.2.2.2 Slow-Decay SR (Brake Mode)

In slow-decay mode, both low-side sinking drivers turn on, allowing the current to circulate through the low side of the H-bridge (two sink drivers) and the load. Power dissipation I2R loses in the two sink DMOS drivers as shown in Equation 3.

Equation 3. E002_SLVSAS7.gif

8.2.3 Application Curves

ac_trans1_slvsc79.gif
Figure 8. 75% Drive, 25% Slow Decay; ƒ(PWM) = 5 kHz
ac_trans2_slvsc79.gif
Figure 9. 75% Drive, 25% Fast Decay; ƒ(PWM) = 5 kHz
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