SLVS865J September 2008 – April 2017 DRV8811
PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AOUT1 | 4 | O | Bridge A output 1. Connect to bipolar stepper motor winding A |
AOUT2 | 25 | O | Bridge A output 2. Positive current is AOUT1 → AOUT2 |
BOUT1 | 11 | O | Bridge B output 1. Connect to bipolar stepper motor winding B |
BOUT2 | 18 | O | Bridge B output 2. Positive current is BOUT1 → BOUT2 |
CP1 | 23 | PWR | Charge pump flying capacitor. Connect a 0.22-μF capacitor between CP1 and CP2 |
CP2 | 24 | PWR | Charge pump flying capacitor. Connect a 0.22-μF capacitor between CP1 and CP2 |
DECAY | 5 | I | Decay mode select. Voltage applied sets decay mode - see motor driver description for details. Bypass to GND with a 0.1-μF ceramic capacitor |
DIR | 3 | I | Direction input. Level sets the direction of stepping |
ENABLEn | 26 | I | Enable input. Logic high to disable device outputs, logic low to enable outputs |
GND | 7, 21 | — | Device ground |
HOMEn | 2 | O | Home position. Logic low when at home state of step table, logic high at other states |
ISENA | 1 | I | Bridge A ground / ISENSE. Connect to current sense resistor for bridge A |
ISENB | 14 | I | Bridge B ground / ISENSE. Connect to current sense resistor for bridge B |
RCA | 6 | I | Bridge A blanking and off time adjust. Connect a parallel resistor and capacitor to GND - see motor driver description for details |
RCB | 9 | I | Bridge B blanking and off time adjust. Connect a parallel resistor and capacitor to GND - see motor driver description for details |
RESETn | 17 | I | Reset input. Active-low reset input initializes the indexer logic and disables the H-bridge outputs |
SLEEPn | 27 | I | Sleep mode input. Logic high to enable device, logic low to enter low-power sleep mode |
SRn | 16 | I | Synchronous rectification enable input. Active-low. When low, synchronous rectification is enabled. Weak internal pulldown. |
STEP | 19 | I | Step input. Rising edge causes the indexer to move one step |
USM0 | 13 | I | Microstep mode 0. USM0 and USM1 set the step mode - full step, half step, quarter step, or eight microsteps/step |
USM1 | 12 | I | Microstep mode 1. USM0 and USM1 set the step mode - full step, half step, quarter step, or eight microsteps/step |
VCC | 10 | PWR | Logic supply voltage. Connect to 3-V to 5-V logic supply. Bypass to GND with a 0.1-μF ceramic capacitor |
VCP | 22 | PWR | High-side gate drive voltage. Connect a 0.22-μF ceramic capacitor to VM |
VGD | 20 | PWR | Low-side gate drive voltage. Bypass to GND with a 0.22-μF ceramic capacitor |
VMA | 28 | PWR | Bridge A power supply. Connect to motor supply (8 V to 38 V). Both VMA and VMB must be connected to same supply. |
VMB | 15 | PWR | Bridge B power supply. Connect to motor supply (8 V to 38 V). Both VMA and VMB must be connected to same supply. |
VREF | 8 | I | Current set reference input. Reference voltage for winding current set |
Thermal pad | — | — | Thermal pad. Connect to system ground with large copper plane for improved thermal dissipation. |