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ZHCSA67F June 2012 – April 2021 DRV8837 , DRV8838

PRODUCTION DATA

6.6 Timing Requirements

T_A = 25°C, VM = 5 V, VCC = 3 V, RL = 20 Ω

NO.				MIN	MAX	UNIT
1	t₁	Delay time, PHASE high to OUT1 low	See Figure 6-1.		160	ns
2	t₂	Delay time, PHASE high to OUT2 high			200	ns
3	t₃	Delay time, PHASE low to OUT1 high			200	ns
4	t₄	Delay time, PHASE low to OUT2 low			160	ns
5	t₅	Delay time, ENBL high to OUTx high			200	ns
6	t₆	Delay time, ENBL low to OUTx low			160	ns
7	t₇	Output enable time	See Figure 6-2.		300	ns
8	t₈	Output disable time			300	ns
9	t₉	Delay time, INx high to OUTx high			160	ns
10	t₁₀	Delay time, INx low to OUTx low			160	ns
11	t₁₁	Output rise time		30	188	ns
12	t₁₂	Output fall time		30	188	ns
	t_wake	Wake time, nSLEEP rising edge to part active			30	μs

Figure 6-1 Input and Output Timing for DRV8838

Figure 6-2 Input and Output Timing for DRV8837