ZHCSBM8C September   2013  – October 2014 DRV8860

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 简化电路原理图
  5. 修订历史记录
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Recommended Output Current
      2. 8.3.2 Daisy Chain Connection
      3. 8.3.3 Protection Circuits
        1. 8.3.3.1 Overcurrent Protection (OCP)
        2. 8.3.3.2 Open Load Detection (OL)
        3. 8.3.3.3 Thermal Shutdown (TSD)
        4. 8.3.3.4 Undervoltage Lockout (UVLO)
        5. 8.3.3.5 Digital Noise Filter
    4. 8.4 Device Functional Modes
      1. 8.4.1 Internal Registers
    5. 8.5 Programming
      1. 8.5.1 Serial Control Interface
        1. 8.5.1.1 Data Writing Waveform
        2. 8.5.1.2 Fault Register Reading Waveform
        3. 8.5.1.3 Special Command
          1. 8.5.1.3.1 Special command: Write Control Register
          2. 8.5.1.3.2 Special command: Read Control Register
          3. 8.5.1.3.3 Special command: Read Data Register
          4. 8.5.1.3.4 Special command: Fault Register Reset
          5. 8.5.1.3.5 Special command: PWM Start
        4. 8.5.1.4 Output Energizing and PWM Control
          1. 8.5.1.4.1 PWM Start Special Command Used
    6. 8.6 Register Maps
      1. 8.6.1 Data Register
      2. 8.6.2 Fault Register
      3. 8.6.3 Control Register
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Drive Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply and Logic Sequencing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Consideration
      1. 11.3.1 Power Dissipation
      2. 11.3.2 Heatsinking
  12. 12器件和文档支持
    1. 12.1 商标
    2. 12.2 静电放电警告
    3. 12.3 术语表
  13. 13机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Power supply voltage range VM –0.3 40 V
Digital input pin current range ENABLE, LATCH, CLK, DIN 0 20 mA
Digital output pin voltage range DOUT, nFAULT –0.5 7 V
Digital output pin current DOUT, nFAULT –0.5 7 V
Output voltage range OUTx –0.3 40 V
Output current range OUTx Internally limited A
Operating virtual junction temperature range, TJ –40 150 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Power dissipation and thermal limits must be observed

7.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –60 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) –2 2 kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) –500 500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VM Motor power supply voltage range 8 38 V
IOUT Low-side driver current capability 560 mA
TA Operating ambient temperature range –40 85 °C

7.4 Thermal Information(1)

over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC TSSOP HTSSOP UNIT
PW (16 PINS) PWP (16 PINS)
ΘJA Junction-to-ambient thermal resistance 103 40.9 °C/W
RθJC(TOP) Junction-to-case (top) thermal resistance 37.9 28.5
RθJB Junction-to-board thermal resistance 48 23.2
ΨJT Junction-to-top characterization parameter 3 0.9
ΨJB Junction-to-board characterization parameter 47.4 23.0
RθJC(BOTTOM) Junction-to-case (bottom) thermal resistance N/A 3.0
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

TA = 25°C, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES
I(VM) VM operating supply current VM = 24 V 3 mA
V(UVLO) VM undervoltage lockout voltage VM rising 8.2 V
LOGIC-LEVEL INPUTS (DIN, CLK, LATCH, ENABLE)
VIL Input low voltage 0 0.7 V
VIH Input high voltage 1.5 5.3 V
VHYS Input hysteresis 100 mV
IIL Input low current VIN = 0 –20 20 µA
IIH Input high current VIN = 3.3 V 100 µA
RPD Input pulldown resistance 100
nFAULT, DOUT OUTPUTS (OPEN-DRAIN OUTPUTS)
VOL Output low voltage IO = 5 mA 0.5 V
IOH Output high leakage current VO = 3.3 V, nFAULT –1 1 µA
RPU Input pullup resistance DOUT only (Pull up to internal 5.7 V) 1.4
LOW-SIDE FET DRIVERS
Rds(on) FET on resistance VM = 24 V, IO = 150 mA, TJ = 25°C 1.5 Ω
VM = 24 V, IO = 150 mA, TJ = 85°C 1.8
IOFF Off-state leakage current VM = 24 V, TJ = 25°C 0 30 µA
HIGH-SIDE FREE-WHEELING DIODES
VF Diode forward voltage VM = 2 4V, IO = 150 mA, TJ = 25°C 0.9 V
PROTECTION CIRCUITS
IOCP Overcurrent protection trip level Each channel separately monitored 620 mA
IOL Open load detect pull-down current Each channel separately monitored 30 µA
VOL Open load detect threshold voltage Each channel separately monitored 1.2 V
TTSD Thermal shutdown temperature Die temperature 150 160 180 °C
THYS Thermal shutdown hysteresis Die temperature 35 °C
PWM CHOPPING FREQUENCY
fPWM PWM chopping frequency Duty cycle is > 25% 45 50 55 kHz
Duty cycle is 25% 22 25 28
Duty cycle is 12.5% 11 12.5 14

7.6 Timing Requirements

MIN TYP MAX UNIT
tPD Propagation delay STEP to current change 150 ns
tR Rise time IO = 150 mA, VM = 24 V, resistive load 50 300 ns
tF Fall time 50 300 ns
tOCP Overcurrent protection deglitch time VM = 24 V 2.7 3.5 3.85 µs
tOL Open load detect deglitch time Each channel separately monitored 14 17 20 µs

7.7 Typical Characteristics

C001_SLRS065.png
Figure 1. Output ON Resistance
C002_SLRS065.png
Figure 2. VM Operating Supply Current