In addition to the CLR_FLT bit in the SPI register, a latched fault can be cleared through a quick nSLEEP pulse. This pulse must be greater than the nSLEEP deglitch time of 5 µs and shorter than 20 µs. If nSLEEP is low for longer than 20 µs, the faults are cleared and the device may or may not shutdown, as shown in the timing diagram (see Figure 7-14). This reset pulse resets any SPI faults and does not affect the status of the charge pump or other functional blocks.

Figure 7-14 nSLEEP Reset Pulse