ZHCSFZ1A January 2017 – July 2018 DRV8886
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
HTSSOP | WQFN | |||
AOUT1 | 5 | 3 | O | Winding A output. Connect to stepper motor winding. |
AOUT2 | 7 | 5 | ||
AVDD | 13 | 12 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-μF, 6.3-V ceramic capacitor. |
BOUT1 | 10 | 8 | O | Winding B output. Connect to stepper motor winding. |
BOUT2 | 8 | 6 | ||
CPH | 2 | 28 | PWR | Charge pump switching node. Connect a X5R or X7R, 0.022-μF, VM-rated ceramic capacitor from CPH to CPL. |
CPL | 1 | 27 | ||
DECAY | 24 | 25 | I | Decay-mode setting. Sets the decay mode (see the Decay Modes section). Decay mode can be adjusted during operation. |
DIR | 20 | 21 | I | Direction input. Logic level sets the direction of stepping; internal pulldown resistor. |
DVDD | 14 | 13 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-μF, 6.3-V ceramic capacitor. |
ENABLE | 18 | 19 | I | Enable driver input. Logic high to enable device outputs; logic low to disable; internal pulldown resistor. |
GND | 12 | 10 | PWR | Device ground. Connect to system ground. |
M0 | 21 | 22 | I | Microstepping mode-setting. Sets the step mode; tri-level pins; sets the step mode; internal pulldown resistor. |
M1 | 22 | 23 | ||
NC | — | 11 | — | No connect. No internal connection |
14 | ||||
15 | ||||
26 | ||||
PGND | 6 | 4 | PWR | Power ground. Connect to system ground. |
9 | 7 | |||
RREF | 16 | 17 | I | Current-limit analog input. Connect a resistor to ground to set full-scale regulation current. |
STEP | 19 | 20 | I | Step input. A rising edge causes the indexer to advance one step; internal pulldown resistor. |
TRQ | 23 | 24 | I | Current-scaling control. Scales the output current; tri-level pin. |
VCP | 3 | 1 | PWR | Charge pump output. Connect a X5R or X7R, 0.22-μF, 16-V ceramic capacitor to VM. |
VM | 4 | 2 | PWR | Power supply. Connect to motor supply voltage and bypass to GND with two 0.01-μF ceramic capacitors (one for each pin) plus a bulk capacitor rated for VM. |
11 | 9 | |||
nFAULT | 15 | 16 | OD | Fault indication. Pulled logic low with fault condition; open-drain output requires an external pullup resistor. |
nSLEEP | 17 | 18 | I | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. |