SNLS348E October   2011  – January 2015 DS100BR210

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Electrical Characteristics — Serial Management Bus Interface
    7. 7.7 Timing Requirements — LOS and ENABLE / DISABLE Timing
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 4-Level Input Configuration Guidelines
      2. 8.3.2 Typical 4-Level Input Thresholds
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Control Mode
      2. 8.4.2 SMBus Slave Mode
      3. 8.4.3 SMBus Master Mode
      4. 8.4.4 Signal Conditioning Settings
    5. 8.5 Programming
      1. 8.5.1 System Management Bus (SMBus) and Configuration Registers
      2. 8.5.2 Transfer Of Data Via the SMBus
      3. 8.5.3 SMBus Transactions
      4. 8.5.4 Writing a Register
      5. 8.5.5 Reading a Register
      6. 8.5.6 EEPROM Programming
        1. 8.5.6.1 Master EEPROM Programming
        2. 8.5.6.2 EEPROM Address Mapping
    6. 8.6 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Signal Integrity in 10G-KR Applications
      2. 9.1.2 OOB (Out-of-Band) Functionality in SAS/SATA Applications
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Plots
        1. 9.2.3.1 Equalization Results (Pre-Channel Only)
        2. 9.2.3.2 Equalization and De-Emphasis Results (Pre-channel and Post-channel, No Tx Source De-emphasis)
        3. 9.2.3.3 Equalization and De-Emphasis Results (Pre-channel and Post-channel, -6 dB Tx Source De-emphasis)
  10. 10Power Supply Recommendations
    1. 10.1 3.3-V or 2.5-V Supply Mode Operation
    2. 10.2 Power Supply Bypass
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 Signal Integrity in 10G-KR Applications

When configured in "KR Mode", using either the VOD_SEL and MODE pin setting or SMBus register control, the DS100BR210 is designed to operate transparently within a KR backplane channel environment. Installing a DS100BR210 repeater within the KR backplane channel splits the total channel attenuation into two parts. In other words, operating in "KR Mode" implies that signals will pass through the repeater with a linearized output. Ideally the repeater can be placed near the middle of the channel, maximizing the signal-to-noise ratio across the bidirectional interface.

In order to maximize the 10G-KR solution space, the 802.3ap specification calls for an optimization of the Tx partner signal conditioning coefficients based on feedback from the KR Rx ASIC endpoint. This link optimization sequence is commonly referred to as "link training" and is performed at speed (10.3125 Gbps). Setting the DS100BR210 active CTLE to compensate for the channel loss from each of the KR transmitters will reduce the transmit and receive equalization settings required on the KR physical layer devices. This central location keeps a larger signal-to-noise ratio at all points in the channel, extending the available solution space and increasing the overall margin of almost any channel. Suggested initial settings for the DS100BR210 are given in Table 10 and Table 11. Further adjustments to EQx, DEMx, and VODx settings may optimize signal margin on the link for different system applications.

Table 10. Suggested 10G-KR Initial Device Settings in Pin Mode(1)

CHANNEL SETTINGS PIN MODE
EQx[1:0] 0, 0
VOD_SEL 1
DEMx 0
(1) For 10G-KR mode with slow idle-to-active response, the MODE pin should be left floating.

Table 11. Suggested 10G-KR Initial Device Settings in SMBus Modes

CHANNEL SETTINGS SMBus MODES
EQx 0x00
VODx 100'b
DEMx 000'b

The SMBus Slave Mode code example in Table 12 may be used to program the DS100BR210 with the recommended device settings.

Table 12. SMBus 10G-KR Example Sequence

REGISTER WRITE VALUE COMMENTS
0x06 0x18 Set SMBus Slave Mode Register Enable.
0x08 0x04 Enable Output Mode Control for individual channel outputs.
0x0F 0x00 Set CHA EQ to 0x00.
0x10 0xAD Set CHA Output Mode to Linear (10G-KR mode).
If link-training is not required, set Reg 0x10 to 0xED.
0x11 0x00 Set CHA DEM to 000'b.
0x16 0x00 Set CHB EQ to 0x00.
0x17 0xAD Set CHB Output Mode to Linear (10G-KR mode).
If link-training is not required, set Reg 0x18 to 0xED.
0x18 0x00 Set CHB DEM to 000'b.
0x25 0xB1 Set CHA VOD to 100'b.
0x28 0x00 Leave Idle Control at default levels.
For SAS/SATA applications, set Reg 0x28 to 0x4C.
0x2D 0xB1 Set CHB VOD to 100'b.

9.1.2 OOB (Out-of-Band) Functionality in SAS/SATA Applications

For SAS/SATA systems, a low speed OOB (Out-of-Band) communication sequence is used to detect and communicate device capabilities between host ASIC and link partners. These OOB signals, including COMWAKE, COMINIT, COMRESET, and COMSAS, are a series of burst, idle, and negation times transmitted and detected across the SAS/SATA link. These bursts occur at a rapid rate, with the COMWAKE signal having the most stringent requirement of 106.6 ns active followed by 106.6 ns idle. Normally, if the device is set in 10G-KR mode (MODE pin floating), the device goes idle-to-active in approximately 150 ns. If the device is set to SAS mode (MODE pin tied via 1 kΩ to VDD (2.5 V mode) or VIN (3.3 V mode)), the device goes idle-to-active in approximately 3 to 4 ns. This fast idle-to-active time is critical to pass OOB signaling, and when operating in pin mode, the MODE pin should be tied high. If operating in SMBus slave mode, the user can set Reg 0x28 to 0x4C for this faster idle-to-active response.

9.2 Typical Application

The DS100BR210 works to extend the reach possible by using active equalization on the channel, boosting attenuated signals so that they can be more easily recovered at the Rx endpoint. The capability of the repeater can be explored across a range of data rates and ASIC-to-link-partner signaling, as shown in the following test setup connections. The test setup connections diagrams shown represent typical generic application scenarios for the DS100BR210.

ds100br210_generic_1.gifFigure 10. Test Setup Connections Diagram
Pre-Channel Only
ds100br210_generic_3.gifFigure 11. Test Setup Connections Diagram
Pre-Channel and Post-Channel, No Tx Source De-emphasis
ds100br210_generic_2.gifFigure 12. Test Setup Connections Diagram
Pre-Channel and Post-Channel, -6 dB Tx Source De-emphasis

9.2.1 Design Requirements

As with any high speed design, there are many factors that influence the overall performance. Below are a list of critical areas for consideration during design.

  • Use 100 Ω impedance traces. Length matching on the P and N traces should be done on the single-ended segments of the differential pair.
  • Use uniform trace width and trace spacing for differential pairs.
  • Place AC-coupling capacitors near to the receiver end of each channel segment to minimize reflections.
  • The maximum body size for AC-coupling capacitors is 0402.
  • Back-drill connector vias and signal vias to minimize stub length.
  • Use Reference plane vias to ensure a low inductance path for the return current.

9.2.2 Detailed Design Procedure

The DS100BR210 is designed to be placed at an offset location with respect to the overall channel attenuation. In order to optimize performance, the repeater requires optimization to extend the reach of the cable or trace length while also recovering a solid eye opening. To optimize the repeater in a 10G-KR environment, the settings mentioned in Table 10 (for Pin Mode) and Table 11 (for SMBus Modes) are recommended as a default starting point. For a generic 10GbE application where link training is not required, the following settings in Table 13 and Table 14 may be referenced as an initial starting point:

Table 13. Suggested Generic 10GbE Initial Device Settings in Pin Mode(1)

CHANNEL SETTINGS PIN MODE
EQx[1:0] 0, 0
VOD_SEL 0
DEMx 0
(1) For 10GbE applications, the MODE pin should be tied high.

Table 14. Suggested Generic 10GbE Initial Device Settings in SMBus Modes

CHANNEL SETTINGS SMBus MODES
EQx 0x00
VODx 000'b
DEMx 000'b

Examples of the repeater performance are illustrated in the performance curves in the next section.

9.2.3 Application Performance Plots

The lab setups referenced in Figure 10 to Figure 12 were used to collect typical performance data on FR4 and cable media. For all measurements, Mode Pin = Float.

9.2.3.1 Equalization Results (Pre-Channel Only)

1v0in_5in4mil_NR.gif
No Repeater Used
Figure 13. TL = 5 Inch 4–Mil FR4 Trace,
No Repeater, 8 Gbps
1v0in_10in4mil_NR.gif
No Repeater Used
Figure 15. TL = 10 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_15in4mil_NR.gif
No Repeater Used
Figure 17. TL = 15 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_20in4mil_NR.gif
No Repeater Used
Figure 19. TL = 20 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_30in4mil_NR.gif
No Repeater Used
Figure 21. TL = 30 Inch 4–Mil FR4 Trace,
No Repeater Used, 10.3125 Gbps
1v0in_35in4mil_NR.gif
No Repeater Used
Figure 23. TL = 35 Inch 4–Mil FR4 Trace,
No Repeater Used, 10.3125 Gbps
1v0in_3m30awg_NR.gif
No Repeater Used
Figure 25. TL = 3-Meter 30-AWG 100 Ω Twin-Axial Cable,
No Repeater, 10.3125 Gbps
1v0in_7m30awg_NR.gif
No Repeater Used
Figure 27. TL = 7-Meter 30-AWG 100 Ω Twin-Axial Cable,
No Repeater, 10.3125 Gbps
1v0in_10m30awg_NR.gif
No Repeater Used
Figure 29. TL = 10-Meter 30-AWG 100 Ω Twin-Axial Cable,
No Repeater, 10.3125 Gbps
1v0in_5in4mil_EQ01_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x01, DEMA = 000'b, VOD = 000'b
Figure 14. TL = 5 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_10in4mil_EQ02_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x02, DEMA =000'b, VODA = 000'b
Figure 16. TL= 10 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_15in4mil_EQ03_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x03, DEMA = 000'b, VOD = 000'b
Figure 18. TL = 15 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_20in4mil_EQ07_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x07, DEMA = 000'b, VOD = 000'b
Figure 20. TL = 20 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_30in4mil_EQ0F_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x0F, DEMA = 000'b, VOD = 000'b
Figure 22. TL = 30 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_35in4mil_EQ1F_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x1F, DEMA = 000'b, VOD = 000'b
Figure 24. TL = 35 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_3m30awg_EQ03_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x03, DEMA = 000'b, VODA = 000'b
Figure 26. TL = 3-Meter 30-AWG 100 Ω Twin-Axial Cable,
DS100BR210 CHA, 10.3125 Gbps
1v0in_7m30awg_EQ0F_DEM00_VOD03.gif
DS100BR210 Settings: EQA = 0x0F, DEMA = 000'b, VODA = 011'b
Figure 28. TL = 7-Meter 30-AWG 100 Ω Twin-Axial Cable,
DS100BR210 CHA, 10.3125 Gbps
1v0in_10m30awg_EQ2F_DEM00_VOD00.gif
DS100BR210 Settings: EQA = 0x2F, DEMA = 000'b, VODA = 000'b
Figure 30. TL = 10-Meter 30-AWG 100 Ω Twin-Axial Cable,
DS100BR210 CHA, 10.3125 Gbps

9.2.3.2 Equalization and De-Emphasis Results
(Pre-channel and Post-channel, No Tx Source De-emphasis)

1v0in_15in4mil_NR_10in4mil.gif
No Repeater Used
Figure 31. TL1 = 15 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_15in4mil_EQ0B_DEM02_VOD05_10in4mil.gif
DS100BR210 Settings: EQA = 0x0B, DEMA = 010'b, VOD = 101'b
Figure 32. TL1 = 15 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps

9.2.3.3 Equalization and De-Emphasis Results
(Pre-channel and Post-channel, -6 dB Tx Source De-emphasis)

1v0in_-6dbDEM_15in4mil_NR_10in4mil.gif
No Repeater Used
Figure 33. TL1 = 15 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_-6dbDEM_30in4mil_NR_10in4mil.gif
No Repeater Used
Figure 35. TL1 = 30 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_-6dbDEM_40in4mil_NR_10in4mil.gif
No Repeater Used
Figure 37. TL1 = 40 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
No Repeater, 10.3125 Gbps
1v0in_-6dbDEM_15in4mil_EQ00_DEM00_VOD03_10in4mil.gif
DS100BR210 Settings: EQA = 0x00, DEMA = 000'b, VOD = 011'b
Figure 34. TL1 = 15 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_-6dbDEM_30in4mil_EQ03_DEM00_VOD05_10in4mil.gif
DS100BR210 Settings: EQA = 0x03, DEMA = 010'b, VOD = 101'b
Figure 36. TL1 = 30 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps
1v0in_-6dbDEM_40in4mil_EQ03_DEM04_VOD05_10in4mil.gif
DS100BR210 Settings: EQA = 0x03, DEMA = 100'b, VOD = 101'b
Figure 38. TL1 = 40 Inch 4–Mil FR4 Trace,
TL2 = 10 Inch 4–Mil FR4 Trace,
DS100BR210 CHA, 10.3125 Gbps