11.1 Layout Guidelines

The DS125BR111 pinout promotes makes for easy high speed routing and layout. To optimize DS125BR111 performance refer to the following guidelines;

1. Differential pairs going into or out of the DS125BR111 should have adequate pair - pair spacing to minimize crosstalk. Keep a 5x spacing ratio as shown on the Blue pairs in the layout example.
2. Place local V_IN and V_DD capacitors as close as possible to the device supply pins to ensure a low inductance layout. Often the best location is directly under the DS125BR111 pins.
3. Use return current via connections to link reference planes locally. This ensures a low inductance return current path when the differential signal changes layers.
4. Open up the supply planes around differential vias to better match the trace impedance.
5. Place GND vias around the DAP perimeter to ensure optimal electrical and thermal performance.
6. Use 0201 body size coupling capacitors whenever possible, 0402 body size capacitors can also be used if they are placed closer to the Rx on the channel.

11.2 Layout Example

In most cases DS125BR111 layouts will fit neatly into a single or 1-lane application. The example layout shows how to "flip" one of the DS125BR111 channels to produce a 2-channel unidirectional layout.

Figure 12. DS125BR111 Example Unidirectional Layout