ZHCSK36 August 2019 DS160PR410
ADVANCE INFORMATION for pre-production products; subject to change without notice.
The DS160PR410 receivers feature a continuous-time linear equalizer (CTLE) that applies high-frequency boost and low-frequency attenuation to help equalize the frequency-dependent insertion loss effects of the passive channel. Table 1 shows available equalization boost through EQ0_ADDR0 and EQ1_ADDR1 control pins, when in Pin Control mode (EN_SMB=L0).
| EQUALIZATION SETTING | TYPICAL EQ BOOST | |||
|---|---|---|---|---|
| INDEX | EQ1_ADDR1 | EQ0_ADDR0 | @ 4 GHz | @ 8 GHz |
| 0 | L0 | L0 | –0.3 | –0.8 |
| 1 | L0 | L1 | 0.4 | 1.3 |
| 2 | L0 | L2 | 3.3 | 5.7 |
| 3 | L0 | L3 | 3.8 | 7.1 |
| 4 | L1 | L0 | 4.9 | 8.4 |
| 5 | L1 | L1 | 5.2 | 9.1 |
| 6 | L1 | L2 | 5.4 | 9.8 |
| 7 | L1 | L3 | 6.5 | 10.7 |
| 8 | L2 | L0 | 6.7 | 11.3 |
| 9 | L2 | L1 | 7.7 | 12.6 |
| 10 | L2 | L2 | 8.7 | 13.6 |
| 11 | L2 | L3 | 9.1 | 14.4 |
| 12 | L3 | L0 | 9.4 | 15.0 |
| 13 | L3 | L1 | 10.3 | 15.9 |
| 14 | L3 | L2 | 10.6 | 16.5 |
| 15 | L3 | L3 | 11.8 | 17.8 |
The equalization of the device can also be set by writing to SMBus/I2C registers in slave or master mode. Refer to the DS160PR410 Programming Guide (SNLU255) for details.