ZHCSML4 december 2020 DS160PR822
PRODUCTION DATA
The DS160PR822 receivers feature a continuous-time linear equalizer (CTLE) that applies high-frequency boost and low-frequency attenuation to help equalize the frequency-dependent insertion loss effects of the passive channel. Table 7-1 shows available equalization boost through EQ control pins (EQ1_0 and EQ0_0 for channels 0-3 and EQ1_1 and EQ0_1 for channels 4-7), when in Pin Control mode (MODE = L0).
| EQUALIZATION SETTING | TYPICAL EQ BOOST (dB) | |||
|---|---|---|---|---|
| EQ INDEX | EQ1_0 (Ch 0-3) / EQ1_1 (Ch 4-7) | EQ0_0 (Ch0-3) / EQ0_1 (Ch 4-7) | @ 4 GHz | @ 8 GHz |
| 0 | L0 | L0 | 0.0 | -0.2 |
| 1 | L0 | L1 | 1.5 | 4.5 |
| 2 | L0 | L2 | 2.0 | 5.5 |
| 3 | L0 | L3 | 2.5 | 6.5 |
| 4 | L1 | L0 | 2.7 | 7.0 |
| 5 | L1 | L1 | 3.0 | 8.0 |
| 6 | L1 | L2 | 4.0 | 9.0 |
| 7 | L1 | L3 | 5.0 | 10.0 |
| 8 | L2 | L0 | 6.0 | 11.0 |
| 9 | L2 | L1 | 7.0 | 12.0 |
| 10 | L2 | L2 | 7.5 | 13.0 |
| 11 | L2 | L3 | 8.0 | 13.5 |
| 12 | L3 | L0 | 8.5 | 15.0 |
| 13 | L3 | L1 | 9.5 | 16.5 |
| 14 | L3 | L2 | 10.0 | 17.0 |
| 15 | L3 | L3 | 11.0 | 18.0 |
The equalization of the device can also be set by writing to SMBus/I2C registers in slave or master mode. Refer to the DS160PR822 Programming Guide (SNLU279) for details.