ZHCSKG1C November   2015  – October 2019 DS280BR810

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     简化电路原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics -- Serial Management Bus Interface
    7. 6.7 Timing Requirements -- Serial Management Bus Interface
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Data Path Operation
      2. 7.3.2 AC-Coupled Receiver and Transmitter
      3. 7.3.3 Signal Detect
      4. 7.3.4 2-Stage CTLE
      5. 7.3.5 Driver DC Gain Control
      6. 7.3.6 FIR Filter (Limiting Mode)
      7. 7.3.7 Configurable SMBus Address
    4. 7.4 Device Functional Modes
      1. 7.4.1 SMBus Slave Mode Configuration
      2. 7.4.2 SMBus Master Mode Configuration (EEPROM Self Load)
    5. 7.5 Programming
      1. 7.5.1 Transfer of Data with the SMBus Interface
    6. 7.6 Register Maps
      1. 7.6.1 Register Types: Global, Shared, and Channel
      2. 7.6.2 Global Registers: Channel Selection and ID Information
        1. Table 2. Global Register Map
      3. 7.6.3 Shared Registers
        1. Table 3. Shared Register Map
      4. 7.6.4 Channel Registers
        1. Table 4. Channel Register Map
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Backplane and Mid-Plane Reach Extension
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Front-Port Applications
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Initialization Set Up
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.1 Device Data Path Operation

The DS280BR810 data path consists of several key blocks as shown in Functional Block Diagram. These key circuits are:

  • AC-coupled Receiver and Transmitter
  • Signal Detect
  • 2-stage CTLE
  • Driver DC Gain Control
  • FIR Filter
  • Data path Mux
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