ZHCSKE4C october 2016 – december 2020 DS280MB810
PRODUCTION DATA
The System Management Bus (SMBus) is a two-wire serial interface through which a master can communicate with various system components. Slave devices are identified by a unique device address. The two-wire serial interface consists of SDC and SDA signals. SDC is a clock output from the master to all of the slave devices on the bus. SDA is a bidirectional data signal between the master and slave devices. The DS280MB810 SMBus SDC and SDA signals are open drain and require external pull-up resistors.
Start and Stop Conditions:
The master generates Start and Stop conditions at the beginning and end of each transaction:
The master generates 9 clock pulses for each byte transfer. The 9th clock pulse constitutes the acknowledge (ACK) cycle. The transmitter releases SDA to allow the receiver to send the ACK signal. An ACK is when the device pulls SDA LOW, while a NACK (no acknowledge) is recorded if the line remains HIGH.
Writing data from a master to a slave consists of three parts:
SMBus read operations consist of four parts: