ZHCSKE4C october 2016 – december 2020 DS280MB810
PRODUCTION DATA
For backplane, mid-plane, and chip-to-chip reach extension applications, use the guidelines in the table below.
| DESIGN PARAMETER | REQUIREMENT |
|---|---|
| AC coupling capacitors | Generally not required. 220-nF AC coupling capacitors are included in the DS280MB810 package on the RX side. |
| Input channel insertion loss | ≥ 10 dB at 14 GHz as a rough guideline. For best performance, the input channel insertion loss should be greater than or equal to the equalizer boost setting used in the DS280MB810. |
| Output channel insertion loss | Depends on downstream ASIC or FPGA SerDes capabilities. Should be ≥ 5 dB at 14 GHz as a rough guideline. |
| Total (input + output) channel insertion loss | Depends on downstream ASIC or FPGA SerDes capabilities. The DS280MB810 can extend the reach between two ASICs by 17+ dB beyond the ASICs' normal capabilities. |
| Link partner TX launch amplitude | 800 mVPP to 1200 mVPP differential |
| Link partner TX FIR filter | Depends on the channel loss. |