米6体育平台手机版

ZHCSKE4C october 2016 – december 2020 DS280MB810

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机械数据 (封装 | 引脚)

ZBL|135
- MPBGAM0

散热焊盘机械数据 (封装 | 引脚)

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7.5 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER
W_channel	Power consumption per active channel	Channel enabled with maximum driver VOD (DRV_SEL_VOD = 3). Static power consumption not included.		82	109 ⁽¹⁾	mW
W_channel	Power consumption per active channel	Channel enabled with minimum driver VOD (DRV_SEL_VOD = 0). Static power consumption not included.		75	100 ⁽¹⁾	mW
W_{channel_CP}	Power consumption per active channel, cross-point enabled	Channel enabled, cross-point enabled, and maximum driver VOD (DRV_SEL_VOD = 3). Static power consumption not included.		82	109 ⁽¹⁾	mW
W_{channel_CP}	Power consumption per active channel, cross-point enabled	Channel enabled, cross-point enabled, and minimum driver VOD (DRV_SEL_VOD = 0). Static power consumption not included.		75	100 ⁽¹⁾	mW
W_{channel_FO}	Power consumption per active channel, fanout enabled	Channel enabled, fanout enabled, and maximum driver VOD (DRV_SEL_VOD = 3). Static power consumption not included.		69	95 ⁽¹⁾	mW
W_{channel_FO}	Power consumption per active channel, fanout enabled	Channel enabled, fanout enabled, and minimum driver VOD (DRV_SEL_VOD = 0). Static power consumption not included.		61	86 ⁽¹⁾	mW
W_{static_total}	Idle (static) mode total device power consumption	Channels disabled and powered down (DRV_PD = 1, EQ_PD = 1).		110	173 ⁽¹⁾	mW
I_total	Active mode total device supply current consumption	All channels enabled with maximum driver VOD (DRV_SEL_VOD = 3).		307	389	mA
I_total	Active mode total device supply current consumption	All channels enabled with minimum driver VOD (DRV_SEL_VOD = 0).		283	361	mA
I_{total_CP}	Active mode total device supply current consumption, cross-point enabled	All channels enabled, cross-point enabled, and maximum driver VOD (DRV_SEL_VOD = 3).		307	389	mA
I_{total_CP}		All channels enabled, cross-point enabled, and minimum driver VOD (DRV_SEL_VOD = 0).		283	361	mA
I_{total_FO}	Active mode total device supply current consumption, fanout enabled	All channels enabled, fanout enabled, and maximum driver VOD (DRV_SEL_VOD = 3).		264	346	mA
I_{total_FO}		All channels enabled, fanout enabled, and minimum driver VOD (DRV_SEL_VOD = 0).		240	318	mA
I_{static_total}	Idle (static) mode total device supply current consumption	All channels disabled and powered down (DRV_PD = 1, EQ_PD = 1).		44	66	mA
LVCMOS DC SPECIFICATIONS (CAL_CLK_IN, CAL_CLK_OUT, READ_EN_N, ALL_DONE_N, MUXSEL[1:0])
V_IH	High level input voltage		1.75		VDD	V
V_IH	High level input voltage	READ_EN_N pin only	1.75		3.6	V
V_IL	Low level input voltage		GND		0.7	V
V_OH	High level output voltage	IOH = 4 mA	2			V
V_OL	Low level output voltage	IOL = -4 mA			0.4	V
I_IH	Input high leakage current	Vinput = VDD, MUXSEL[1:0] pins			16	µA
		Vinput = VDD, CAL_CLK_IN pin			66	µA
		Vinput = VDD, READ_EN_N pin ⁽²⁾			1	µA
I_IL	Input low leakage current	Vinput = 0 V, MUXSEL[1:0] pins	-38			µA
		Vinput = 0 V, CAL_CLK_IN pin ⁽³⁾	-1			µA
		Vinput = 0 V, READ_EN_N pin ⁽²⁾	-55			µA
4-LEVEL LOGIC ELECTRICAL SPECIFICATIONS (APPLIES TO 4-LEVEL INPUT CONTROL PINS ADDR0, ADDR1, and EN_SMB)
I_IH	Input high leakage current				105	µA
I_IL	Input low leakage current		-253			µA
V_TH	High level (1) input voltage			0.95 * VDD		V
	Float level input voltage			0.67 * VDD		V
	10 K to GND input voltage			0.33 * VDD		V
	Low level (0) input voltage			0.1		V
HIGH-SPEED DIFFERENTIAL INPUTS (RXnP, RXnN)
BST	CTLE high-frequency boost	Measured with maximum CTLE setting and maximum BW setting (EQ_BST1 = 7, EQ_BST2 = 7, EQ_BW = 3). Boost is defined as the gain at 14 GHz relative to 20 MHz.		25.6		dB
BST	CTLE high-frequency boost	Measured with maximum CTLE setting and maximum BW setting (EQ_BST1 = 7, EQ_BST2 = 7, EQ_BW = 3). Boost is defined as the gain at 12.9 GHz relative to 20 MHz.		25.3		dB
BST	CTLE high-frequency boost	Measured with minimum CTLE setting and minimum BW setting (EQ_BST1 = 0, EQ_BST2 = 0, EQ_BW = 0, EQ_EN_BYPASS = 1). Boost is defined as the gain at 14 GHz relative to 20 MHz.		2.4		dB
BST	CTLE high-frequency boost	Measured with minimum CTLE setting and minimum BW setting (EQ_BST1 = 0, EQ_BST2 = 0, EQ_BW = 0, EQ_EN_BYPASS = 1). Boost is defined as the gain at 12.9 GHz relative to 20 MHz.		2.4		dB
BST_delta	CTLE high-frequency gain variation	Measured with maximum CTLE setting (EQ_BST1 = 7, EQ_BST2 = 7). Gain variation is defined as the total change in gain at 14 GHz due to temperature and voltage variation.		< 3		dB
BST_delta	CTLE high-frequency gain variation	Measured with maximum CTLE setting (EQ_BST1 = 7, EQ_BST2 = 7). Gain variation is defined as the total change in gain at 12.9 GHz due to temperature and voltage variation.		< 3		dB
BST_delta	CTLE high-frequency gain variation	Measured with minimum CTLE setting (EQ_BST1 = 0, EQ_BST2 = 0, EQ_EN_BYPASS = 1). Gain variation is defined as the total change in gain at 14 GHz due to temperature and voltage variation.		< 2		dB
BST_delta	CTLE high-frequency gain variation	Measured with minimum CTLE setting (EQ_BST1 = 0, EQ_BST2 = 0, EQ_EN_BYPASS = 1). Gain variation is defined as the total change in gain at 12.9 GHz due to temperature and voltage variation.		< 2		dB
RL_SDD11	Input differential return loss	50 MHz to 3.7 GHz		< -14		dB
		3.7 GHz to 10 GHz		< -12		dB
		10 GHz to 14.1 GHz		< -8		dB
		14.1 GHz to 20 GHz		< -6		dB
RL_SDC11	Input differential-to-common-mode return loss	100 MHz to 3.3 GHz		< -35		dB
		3.3 GHz to 12.9 GHz		< -26		dB
		12.9 GHz to 20 GHz		< -22		dB
RL_SCC11	Input common-mode return loss	100 MHz to 10 GHz		< -7		dB
RL_SCC11	Input common-mode return loss	10 GHz to 20 GHz		< -8		dB
V_SDAT	AC signal detect assert (ON) differential voltage threshold level	Minimum input peak-to-peak amplitude level at device pins required to assert signal detect. 25.78125 Gbps with PRBS7 pattern and 20 dB loss channel.		196		mVpp
V_SDDT	AC signal detect de-assert (OFF) differential voltage threshold level	Maximum input peak-to-peak amplitude level at device pins which causes signal detect to de-assert. 25.78125 Gbps with PRBS7 pattern and 20 dB loss channel.		147		mVpp
VID_linear	Input amplitude linear range. The maximum VID for which the repeater remains linear, defined as ≤1 dB compression of Vout/Vin.	Measured with the highest wide-band gain setting (EQ_HIGH_GAIN = 1, DRV_SEL_VOD = 3). Measured with minimal input channel and minimum EQ using a 1 GHz signal.		850		mVpp
		Measured with a mid wide-band gain setting (EQ_HIGH_GAIN = 1, DRV_SEL_VOD = 0). Measured with minimal input channel and minimum EQ using a 1 GHz signal.		900		mVpp
		Measured with a mid wide-band gain setting (EQ_HIGH_GAIN = 0, DRV_SEL_VOD = 3). Measured with minimal input channel and minimum EQ using a 1 GHz signal.		1050		mVpp
		Measured with the lowest wide-band gain setting (EQ_HIGH_GAIN = 0, DRV_SEL_VOD = 0). Measured with minimal input channel and minimum EQ using a 1 GHz signal.		1250		mVpp
HIGH-SPEED DIFFERENTIAL OUTPUTS (TXnP, TXnN)
VOD_idle	Differential output amplitude, TX disabled or otherwise muted			< 10		mVpp
G_DC	Vout/Vin wide-band amplitude gain	Measured with the highest wide-band gain setting (EQ_HIGH_GAIN = 1, DRV_SEL_VOD = 3) at 20 MHz.		4.5		dB
G_DC	Vout/Vin wide-band amplitude gain	Measured with the lowest wide-band gain setting (EQ_HIGH_GAIN = 0, DRV_SEL_VOD = 0) at 20 MHz.		-5		dB
V_cm-TX-AC	Common-mode AC output noise	Defined as (TXP + TXN)/2. Measured with a low-pass filter with 3 dB bandwidth at 33 GHz.		6		mV, RMS
V_cm-TX-DC	Common-mode DC output	Defined as (TXP + TXN)/2. Measured with a DC signal.	0.75	0.96	1.05	V
RJ_ADD-RMS	Additive Random Jitter	Measured as a single-ended signal on a Keysight E5505A phase noise measurement solution with a 28 Gbps 1010 pattern. Additive RJ measured over a frequency range of 2 kHz to 20 MHz.		11		fs RMS
RL_SDD22	Output differential-to-differential return loss	50 MHz to 4.8 GHz		< -16		dB
		4.8 GHz to 10 GHz		< -15		dB
		10 GHz to 14.1 GHz		< -8		dB
		14.1 GHz to 20 GHz		< -8		dB
RL_SCD22	Output common-mode-to-differential return loss	50 MHz to 6.0 GHz		< -21		dB
		6.0 GHz to 12.9 GHz		< -22		dB
		12.9 GHz to 14.1 GHz		< -21		dB
		14.1 GHz to 20 GHz		< -20		dB
RL_SCC22	Output Common-mode return loss	50 MHz to 3.3 GHz		< -13		dB
		3.3 GHz to 10.3 GHz		< -11		dB
		10.3 GHz to 20 GHz		< -9		dB
OTHER PARAMETERS
t_D	Input-to-output latency (propagation delay) through a channel	Straight-thru mode (no cross-point)		100		ps
t_D	Input-to-output latency (propagation delay) through a channel	Cross-over and mux mode (cross-point enabled)		100		ps
t_SK	Channel-to-channel interpair skew	Latency difference between channels		<14		ps
T_EEPROM	EEPROM configuration load time	Time to assert ALL_DONE_N after REAN_EN_N has been asserted. Single device reading its configuration from an EEPROM with common channel configuration. This time scales with the number of devices reading from the same EEPROM. Does not include power-on reset time.			4	ms
T_EEPROM	EEPROM configuration load time	Time to assert ALL_DONE_N after REAN_EN_N has been asserted. Single device reading its configuration from an EEPROM. Non-common channel configuration. This time scales with the number of devices reading from the same EEPROM. Does not include power-on reset time.			7	ms
T_POR	Power-on reset assertion time	Internal power-on reset (PoR) stretch between stable power supply and de-assertion of internal PoR. The SMBus address is latched on the completion of the PoR stretch, and SMBus accesses are permitted once PoR completes.			60	ms

(1) Max values assume VDD = 2.5 V + 5%.

(2) This pin has an internal weak pull-up.

(3) This pin has an internal weak pull-down.

Table 7-1 Electrical Characteristics – Serial Management Bus Interface

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IH	Input high level voltage	SDA and SDC	1.75		3.6	V
V_IL	Input low level voltage	SDA and SDC	GND		0.8	V
V_OL	Output low level voltage	SDA and SDC, I_OL = 1.25 mA	GND		0.4	V
C_IN	Input pin capacitance	SDA and SDC		15		pF
I_IN	Input current	SDA or SDC, VINPUT = VIN, VDD, GND	-18		18	µA