ZHCSTI6 October 2023 DS320PR410
PRODUCTION DATA
If MODE = L2 (SMBus/I2C Secondary control mode), then the DS320PR410 is configured through a standard I2C or SMBus interface that may operate up to 400 kHz. The secondary address of the DS320PR410 is determined by the pin strap settings on the ADDR1 and ADDR0 pins. The sixteen possible secondary addresses for channels 0-3 are provided in Table 7-5. In SMBus/I2C modes the SCL and SDA pins must be pulled up to a 3.3 V supply with a pull-up resistor. The value of the resistor depends on total bus capacitance. 4.7 kΩ is a good first approximation for a bus capacitance of 10 pF.
ADDR1 | ADDR0 | 7-bit Secondary Address Channels 0-3 |
---|---|---|
L0 | L0 | 0x18 |
L0 | L1 | 0x1A |
L0 | L2 | 0x1C |
L0 | L3 | 0x1E |
L0 | L4 | Reserved |
L1 | L0 | 0x20 |
L1 | L1 | 0x22 |
L1 | L2 | 0x24 |
L1 | L3 | 0x26 |
L1 | L4 | Reserved |
L2 | L0 | 0x28 |
L2 | L1 | 0x2A |
L2 | L2 | 0x2C |
L2 | L3 | 0x2E |
L2 | L4 | Reserved |
L3 | L0 | 0x30 |
L3 | L1 | 0x32 |
L3 | L2 | 0x34 |
L3 | L3 | 0x36 |
L3 | L4 | Reserved |
The DS320PR410 has two types of registers:
Channel Registers Base Address | Channel 0-3 Access |
---|---|
0x00 | Channel 0 registers |
0x20 | Channel 1 registers |
0x40 | Channel 2 registers |
0x60 | Channel 3 registers |
0x80 |
Broadcast write channel 0-3 registers, read channel 0 registers |
0xA0 |
Broadcast write channel 0-1 registers, read channel 0 registers |
0xC0 |
Broadcast write channel 2-3 registers, read channel 2 registers |
0xE0 | Channel 0-3 share registers |