ZHCSI69B june 2018 – september 2020 DS90C189-Q1
PRODUCTION DATA
The RFB pin determines the edge that the input LVCMOS data is latched on. If RFB is HIGH, input data is latched on the RISING EDGE of the pixel clock (IN_CLK). If RFB is LOW, the input data is latched on the FALLING EDGE of the pixel clock. Note: This can be set independently of receiver’s output clock strobe.
| RFB | Result |
|---|---|
| 0 | FALLING edge |
| 1 | RISING edge |