ZHCSJA8B September 2005 – January 2019 DS90LV049H
PRODUCTION DATA.
Table 4 lists the design parameters for this example.
DESIGN PARAMETER | EXAMPLE VALUE |
---|---|
Supply Voltage (VDD) | 3 to 3.6 V |
Single-ended Input Voltage | 0 to VDD |
Signaling Rate 1 Ground shift between driver and receiver | 0 to 400 Mbps |
Interconnect Characteristic Impedance | 100 Ω |
Number of LVDS Channel | 4 |
Number of Receiver/Transmitter Nodes | 2 |
Ground shift between driver and receiver | ±1 V |