ZHCSMR3A november 2020 – november 2020 DS90UB633A-Q1
PRODUCTION DATA
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Supply voltage, V(VDD_n) | 1.71 | 1.8 | 1.89 | V | |
LVCMOS supply voltage | V(VDDIO)= 1.8 V | 1.71 | 1.8 | 1.89 | V |
V(VDDIO)= 3.3 V | 3 | 3.3 | 3.6 | ||
V(VDDIO)= 2.8 V | 2.52 | 2.8 | 3.08 | ||
Supply noise(1) | V(VDD_n) = 1.8 V | 25 | mVp-p | ||
V(VDDIO) = 1.8 V | 25 | ||||
V(VDDIO) = 3.3 V | 50 | ||||
Power-Over-Coax Supply Noise | ƒ = 30 Hz - 1 KHz, trise > 100 µs Measured differentially between DOUT+ and DOUT– (coax mode only) | 35 | mVp-p | ||
ƒ = 1 KHz - 50 MHz Measured differentially between DOUT+ and DOUT- (coax mode only) | 35 | mVp-p | |||
Operating free air temperature, TA | –40 | 25 | 105 | °C | |
PCLK clock frequency - 10-bit mode | 75 | 100 | MHz | ||
PCLK clock frequency - 12-bit mode | 56.25 | 100 | MHz | ||
External clock input frequency to GPO3 - 10-bit mode | 37.5 | 50 | MHz | ||
External clock input frequency to GPO3 - 12-bit mode | 37.5 | 66.67 | MHz |