ZHCSMR4A november 2020 – november 2020 DS90UB662-Q1
PRODUCTION DATA
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7 | MR_TCK_POST_OV | R/W | 0 | Override CSI-2 Tck-post parameter 0: Tck-post is automatically determined 1: Override Tck-post with value in bits 6:0 of this register |
6:0 | MR_TCK_POST | R R/W | 0x0A | Tck-post value If bit 7 of this register is 0, this field is read-only, indicating current automatically determined value. The default value is based on the 800 Mbps CSI-2 rate and may change if different rate is selected. If bit 7 of this register is 1, this field is read/write. |