This section describes power-up requirements and the PDB pin. The power supply ramp (V_DD33 and V_DDIO) should be faster than 1.5 ms with a monotonic rise. A large capacitor on the PDB pin is needed to ensure PDB arrives after all the supply pins have settled to the recommended operating voltage. The PDB pin requires a 10-kΩ pullup to V_DD33 and a >10-μF capacitor to GND to delay the PDB input signal rise. If PDB is driven externally, do not drive the pin HIGH until V_DD33 and V_DDIO have reached steady state. All inputs must not be driven until both V_DD33 and V_DDIO have reached steady state. Pins VDD33_A and VDD33_B should both be externally connected, bypassed, and driven to the same potential (they are not internally connected).