In External FrameSync mode, an external signal is input to the DS90UB954-Q1 through one of the GPIO pins on the device. The external FrameSync signal may be propagated to one or more of the attached FPD-Link III Serializers through a GPIO signal in the back channel. The expected skew timing for external FrameSynch mode is on the order of one back channel frame period or 600 ns when operating at 50 Mbps.

Figure 7-17 External FrameSync

Enabling the external FrameSync mode is done by setting the FS_MODE control in the FS_CTL register to a value between 0x8 (GPIO0 pin) to 0xE (GPIO6 pin). Set FS_GEN_ENABLE to 0 for this mode.

To send the FrameSync signal on a port’s BC_GPIOx signal, the BC_GPIO_CTL0 or BC_GPIO_CTL1 register should be programmed for that port to select the FrameSync signal.

Figure 7-18 External FrameSync With Two DS90UB954 Deserializers