ZHCSGT3C August 2017 – January 2023 DS90UB954-Q1
PRODUCTION DATA
The primary device address is set through a resistor divider (RHIGH and RLOW — see #SNLS4736564 below) connected to the IDX pin. Note that the voltage of VI2C must match the voltage of VVDDIO. The DS90UB954-Q1 waits 1 ms after PDB goes high to allow time for power supply transients before sampling the IDX value and configuring the device to set the I2C address. The primary I2C target address is stored in the I2C Device ID register at address 0x0. In addition to the primary I2C target address, the DS90UB954-Q1 may be programmed to respond to up to 2 other I2C addresses. The two RX Port ID addresses provide direct access to the Receive Port 0 and Por1 registers without needing to set the paging controls normally required to access the port registers. In addition, these Rx port assigned I2C IDs also allow access to the shared registers in the same manner as the primary I2C target address. The I2C_RX0_ID and I2C_RX1_ID, registers are located in register address 0xF8 and 0xF9, respectively.
The IDX pin configures the control interface to one of eight possible device addresses. A pullup resistor and a pulldown resistor may be used to set the appropriate voltage ratio between the IDX input pin (VIDX) and V(VDD18), each ratio corresponding to a specific device address. See Table 7-15, Serial Control Bus Addresses for IDX.
NO. | VIDX VOLTAGE RANGE | VIDX TARGET VOLTAGE | SUGGESTED STRAP RESISTORS (1% TOL) | PRIMARY ASSIGNED I2C ADDRESS | ||||
---|---|---|---|---|---|---|---|---|
VMIN | VTYP | VMAX | (V); VDD1P8 = 1.80V | RHIGH ( kΩ ) | RLOW ( kΩ ) | 7-BIT | 8-BIT | |
0 | 0 | 0 | 0.131 × V(VDD18) | 0 | OPEN | 10.0 | 0x30 | 0x60 |
1 | 0.179 × V(VDD18) | 0.213 × V(VDD18) | 0.247 × V(VDD18) | 0.374 | 88.7 | 23.2 | 0x32 | 0x64 |
2 | 0.296 × V(VDD18) | 0.330 × V(VDD18) | 0.362 × V(VDD18) | 0.582 | 75.0 | 35.7 | 0x34 | 0x68 |
3 | 0.412 × V(VDD18) | 0.443 × V(VDD18) | 0.474 × V(VDD18) | 0.792 | 71.5 | 56.2 | 0x36 | 0x6C |
4 | 0.525 × V(VDD18) | 0.559 × V(VDD18) | 0.592 × V(VDD18) | 0.995 | 78.7 | 97.6 | 0x38 | 0x70 |
5 | 0.642 × V(VDD18) | 0.673 × V(VDD18) | 0.704 × V(VDD18) | 1.202 | 39.2 | 78.7 | 0x3A | 0x74 |
6 | 0.761 × V(VDD18) | 0.792 × V(VDD18) | 0.823 × V(VDD18) | 1.420 | 25.5 | 95.3 | 0x3C | 0x78 |
7 | 0.876 × V(VDD18) | V(VDD18) | V(VDD18) | 1.8 | 10.0 | OPEN | 0x3D | 0x7A |